cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

tvnv04.c (7588B)


      1/*
      2 * Copyright (C) 2009 Francisco Jerez.
      3 * All Rights Reserved.
      4 *
      5 * Permission is hereby granted, free of charge, to any person obtaining
      6 * a copy of this software and associated documentation files (the
      7 * "Software"), to deal in the Software without restriction, including
      8 * without limitation the rights to use, copy, modify, merge, publish,
      9 * distribute, sublicense, and/or sell copies of the Software, and to
     10 * permit persons to whom the Software is furnished to do so, subject to
     11 * the following conditions:
     12 *
     13 * The above copyright notice and this permission notice (including the
     14 * next paragraph) shall be included in all copies or substantial
     15 * portions of the Software.
     16 *
     17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
     20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
     21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
     22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
     23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
     24 *
     25 */
     26
     27#include "nouveau_drv.h"
     28#include "nouveau_reg.h"
     29#include "nouveau_encoder.h"
     30#include "nouveau_connector.h"
     31#include "nouveau_crtc.h"
     32#include "hw.h"
     33#include <drm/drm_crtc_helper.h>
     34
     35#include <drm/i2c/ch7006.h>
     36
     37static struct nvkm_i2c_bus_probe nv04_tv_encoder_info[] = {
     38	{
     39		{
     40			I2C_BOARD_INFO("ch7006", 0x75),
     41			.platform_data = &(struct ch7006_encoder_params) {
     42				CH7006_FORMAT_RGB24m12I, CH7006_CLOCK_MASTER,
     43				0, 0, 0,
     44				CH7006_SYNC_SLAVE, CH7006_SYNC_SEPARATED,
     45				CH7006_POUT_3_3V, CH7006_ACTIVE_HSYNC
     46			}
     47		},
     48		0
     49	},
     50	{ }
     51};
     52
     53int nv04_tv_identify(struct drm_device *dev, int i2c_index)
     54{
     55	struct nouveau_drm *drm = nouveau_drm(dev);
     56	struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
     57	struct nvkm_i2c_bus *bus = nvkm_i2c_bus_find(i2c, i2c_index);
     58	if (bus) {
     59		return nvkm_i2c_bus_probe(bus, "TV encoder",
     60					  nv04_tv_encoder_info,
     61					  NULL, NULL);
     62	}
     63	return -ENODEV;
     64}
     65
     66
     67#define PLLSEL_TV_CRTC1_MASK				\
     68	(NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1		\
     69	 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1)
     70#define PLLSEL_TV_CRTC2_MASK				\
     71	(NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK2		\
     72	 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK2)
     73
     74static void nv04_tv_dpms(struct drm_encoder *encoder, int mode)
     75{
     76	struct drm_device *dev = encoder->dev;
     77	struct nouveau_drm *drm = nouveau_drm(dev);
     78	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
     79	struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
     80	uint8_t crtc1A;
     81
     82	NV_DEBUG(drm, "Setting dpms mode %d on TV encoder (output %d)\n",
     83		 mode, nv_encoder->dcb->index);
     84
     85	state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK);
     86
     87	if (mode == DRM_MODE_DPMS_ON) {
     88		int head = nouveau_crtc(encoder->crtc)->index;
     89		crtc1A = NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX);
     90
     91		state->pllsel |= head ? PLLSEL_TV_CRTC2_MASK :
     92					PLLSEL_TV_CRTC1_MASK;
     93
     94		/* Inhibit hsync */
     95		crtc1A |= 0x80;
     96
     97		NVWriteVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX, crtc1A);
     98	}
     99
    100	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT, state->pllsel);
    101
    102	get_slave_funcs(encoder)->dpms(encoder, mode);
    103}
    104
    105static void nv04_tv_bind(struct drm_device *dev, int head, bool bind)
    106{
    107	struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head];
    108
    109	state->tv_setup = 0;
    110
    111	if (bind)
    112		state->CRTC[NV_CIO_CRE_49] |= 0x10;
    113	else
    114		state->CRTC[NV_CIO_CRE_49] &= ~0x10;
    115
    116	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_LCD__INDEX,
    117		       state->CRTC[NV_CIO_CRE_LCD__INDEX]);
    118	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_49,
    119		       state->CRTC[NV_CIO_CRE_49]);
    120	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP,
    121		      state->tv_setup);
    122}
    123
    124static void nv04_tv_prepare(struct drm_encoder *encoder)
    125{
    126	struct drm_device *dev = encoder->dev;
    127	int head = nouveau_crtc(encoder->crtc)->index;
    128	const struct drm_encoder_helper_funcs *helper = encoder->helper_private;
    129
    130	helper->dpms(encoder, DRM_MODE_DPMS_OFF);
    131
    132	nv04_dfp_disable(dev, head);
    133
    134	if (nv_two_heads(dev))
    135		nv04_tv_bind(dev, head ^ 1, false);
    136
    137	nv04_tv_bind(dev, head, true);
    138}
    139
    140static void nv04_tv_mode_set(struct drm_encoder *encoder,
    141			     struct drm_display_mode *mode,
    142			     struct drm_display_mode *adjusted_mode)
    143{
    144	struct drm_device *dev = encoder->dev;
    145	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
    146	struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
    147
    148	regp->tv_htotal = adjusted_mode->htotal;
    149	regp->tv_vtotal = adjusted_mode->vtotal;
    150
    151	/* These delay the TV signals with respect to the VGA port,
    152	 * they might be useful if we ever allow a CRTC to drive
    153	 * multiple outputs.
    154	 */
    155	regp->tv_hskew = 1;
    156	regp->tv_hsync_delay = 1;
    157	regp->tv_hsync_delay2 = 64;
    158	regp->tv_vskew = 1;
    159	regp->tv_vsync_delay = 1;
    160
    161	get_slave_funcs(encoder)->mode_set(encoder, mode, adjusted_mode);
    162}
    163
    164static void nv04_tv_commit(struct drm_encoder *encoder)
    165{
    166	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
    167	struct drm_device *dev = encoder->dev;
    168	struct nouveau_drm *drm = nouveau_drm(dev);
    169	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
    170	const struct drm_encoder_helper_funcs *helper = encoder->helper_private;
    171
    172	helper->dpms(encoder, DRM_MODE_DPMS_ON);
    173
    174	NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n",
    175		 nv04_encoder_get_connector(nv_encoder)->base.name,
    176		 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
    177}
    178
    179static void nv04_tv_destroy(struct drm_encoder *encoder)
    180{
    181	get_slave_funcs(encoder)->destroy(encoder);
    182	drm_encoder_cleanup(encoder);
    183
    184	kfree(encoder->helper_private);
    185	kfree(nouveau_encoder(encoder));
    186}
    187
    188static const struct drm_encoder_funcs nv04_tv_funcs = {
    189	.destroy = nv04_tv_destroy,
    190};
    191
    192static const struct drm_encoder_helper_funcs nv04_tv_helper_funcs = {
    193	.dpms = nv04_tv_dpms,
    194	.mode_fixup = drm_i2c_encoder_mode_fixup,
    195	.prepare = nv04_tv_prepare,
    196	.commit = nv04_tv_commit,
    197	.mode_set = nv04_tv_mode_set,
    198	.detect = drm_i2c_encoder_detect,
    199};
    200
    201int
    202nv04_tv_create(struct drm_connector *connector, struct dcb_output *entry)
    203{
    204	struct nouveau_encoder *nv_encoder;
    205	struct drm_encoder *encoder;
    206	struct drm_device *dev = connector->dev;
    207	struct nouveau_drm *drm = nouveau_drm(dev);
    208	struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
    209	struct nvkm_i2c_bus *bus = nvkm_i2c_bus_find(i2c, entry->i2c_index);
    210	int type, ret;
    211
    212	/* Ensure that we can talk to this encoder */
    213	type = nv04_tv_identify(dev, entry->i2c_index);
    214	if (type < 0)
    215		return type;
    216
    217	/* Allocate the necessary memory */
    218	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
    219	if (!nv_encoder)
    220		return -ENOMEM;
    221
    222	/* Initialize the common members */
    223	encoder = to_drm_encoder(nv_encoder);
    224
    225	drm_encoder_init(dev, encoder, &nv04_tv_funcs, DRM_MODE_ENCODER_TVDAC,
    226			 NULL);
    227	drm_encoder_helper_add(encoder, &nv04_tv_helper_funcs);
    228
    229	nv_encoder->enc_save = drm_i2c_encoder_save;
    230	nv_encoder->enc_restore = drm_i2c_encoder_restore;
    231
    232	encoder->possible_crtcs = entry->heads;
    233	encoder->possible_clones = 0;
    234	nv_encoder->dcb = entry;
    235	nv_encoder->or = ffs(entry->or) - 1;
    236
    237	/* Run the slave-specific initialization */
    238	ret = drm_i2c_encoder_init(dev, to_encoder_slave(encoder),
    239				   &bus->i2c,
    240				   &nv04_tv_encoder_info[type].dev);
    241	if (ret < 0)
    242		goto fail_cleanup;
    243
    244	/* Attach it to the specified connector. */
    245	get_slave_funcs(encoder)->create_resources(encoder, connector);
    246	drm_connector_attach_encoder(connector, encoder);
    247
    248	return 0;
    249
    250fail_cleanup:
    251	drm_encoder_cleanup(encoder);
    252	kfree(nv_encoder);
    253	return ret;
    254}