cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

head917d.c (4807B)


      1/*
      2 * Copyright 2018 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 */
     22#include "head.h"
     23#include "core.h"
     24
     25#include "nvif/push.h"
     26#include <nvif/push507c.h>
     27
     28#include <nvhw/class/cl917d.h>
     29
     30static int
     31head917d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
     32{
     33	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
     34	const int i = head->base.index;
     35	int ret;
     36
     37	if ((ret = PUSH_WAIT(push, 2)))
     38		return ret;
     39
     40	PUSH_MTHD(push, NV917D, HEAD_SET_DITHER_CONTROL(i),
     41		  NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
     42		  NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
     43		  NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
     44		  NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
     45	return 0;
     46}
     47
     48static int
     49head917d_base(struct nv50_head *head, struct nv50_head_atom *asyh)
     50{
     51	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
     52	const int i = head->base.index;
     53	u32 bounds = 0;
     54	int ret;
     55
     56	if (asyh->base.cpp) {
     57		switch (asyh->base.cpp) {
     58		case 8: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_64); break;
     59		case 4: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_32); break;
     60		case 2: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); break;
     61		case 1: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_8); break;
     62		default:
     63			WARN_ON(1);
     64			break;
     65		}
     66		bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, USABLE, TRUE);
     67		bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, BASE_LUT, USAGE_1025);
     68	}
     69
     70	if ((ret = PUSH_WAIT(push, 2)))
     71		return ret;
     72
     73	PUSH_MTHD(push, NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS(i), bounds);
     74	return 0;
     75}
     76
     77static int
     78head917d_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)
     79{
     80	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
     81	const int i = head->base.index;
     82	int ret;
     83
     84	ret = PUSH_WAIT(push, 5);
     85	if (ret)
     86		return ret;
     87
     88	PUSH_MTHD(push, NV917D, HEAD_SET_CONTROL_CURSOR(i),
     89		  NVDEF(NV917D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) |
     90		  NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |
     91		  NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |
     92		  NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |
     93		  NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |
     94		  NVDEF(NV917D, HEAD_SET_CONTROL_CURSOR, COMPOSITION, ALPHA_BLEND),
     95
     96				HEAD_SET_OFFSET_CURSOR(i), asyh->curs.offset >> 8);
     97
     98	PUSH_MTHD(push, NV917D, HEAD_SET_CONTEXT_DMA_CURSOR(i), asyh->curs.handle);
     99	return 0;
    100}
    101
    102int
    103head917d_curs_layout(struct nv50_head *head, struct nv50_wndw_atom *asyw,
    104		     struct nv50_head_atom *asyh)
    105{
    106	switch (asyw->state.fb->width) {
    107	case  32: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32; break;
    108	case  64: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64; break;
    109	case 128: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128; break;
    110	case 256: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256; break;
    111	default:
    112		return -EINVAL;
    113	}
    114	return 0;
    115}
    116
    117const struct nv50_head_func
    118head917d = {
    119	.view = head907d_view,
    120	.mode = head907d_mode,
    121	.olut = head907d_olut,
    122	.ilut_check = head907d_ilut_check,
    123	.olut_size = 1024,
    124	.olut_set = head907d_olut_set,
    125	.olut_clr = head907d_olut_clr,
    126	.core_calc = head507d_core_calc,
    127	.core_set = head907d_core_set,
    128	.core_clr = head907d_core_clr,
    129	.curs_layout = head917d_curs_layout,
    130	.curs_format = head507d_curs_format,
    131	.curs_set = head917d_curs_set,
    132	.curs_clr = head907d_curs_clr,
    133	.base = head917d_base,
    134	.ovly = head907d_ovly,
    135	.dither = head917d_dither,
    136	.procamp = head907d_procamp,
    137	.or = head907d_or,
    138};