cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

cl507a.h (2017B)


      1/*
      2 * Copyright (c) 1993-2014, NVIDIA CORPORATION. All rights reserved.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
     20 * DEALINGS IN THE SOFTWARE.
     21 */
     22
     23
     24#ifndef _cl507a_h_
     25#define _cl507a_h_
     26
     27#define NV507A_FREE                                                             (0x00000008)
     28#define NV507A_FREE_COUNT                                                       5:0
     29#define NV507A_UPDATE                                                           (0x00000080)
     30#define NV507A_UPDATE_INTERLOCK_WITH_CORE                                       0:0
     31#define NV507A_UPDATE_INTERLOCK_WITH_CORE_DISABLE                               (0x00000000)
     32#define NV507A_UPDATE_INTERLOCK_WITH_CORE_ENABLE                                (0x00000001)
     33#define NV507A_SET_CURSOR_HOT_SPOT_POINT_OUT                                    (0x00000084)
     34#define NV507A_SET_CURSOR_HOT_SPOT_POINT_OUT_X                                  15:0
     35#define NV507A_SET_CURSOR_HOT_SPOT_POINT_OUT_Y                                  31:16
     36#endif // _cl507a_h