cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

device.h (4512B)


      1/* SPDX-License-Identifier: MIT */
      2#ifndef __NVKM_DEVICE_H__
      3#define __NVKM_DEVICE_H__
      4#include <core/oclass.h>
      5#include <core/event.h>
      6enum nvkm_subdev_type;
      7
      8enum nvkm_device_type {
      9	NVKM_DEVICE_PCI,
     10	NVKM_DEVICE_AGP,
     11	NVKM_DEVICE_PCIE,
     12	NVKM_DEVICE_TEGRA,
     13};
     14
     15struct nvkm_device {
     16	const struct nvkm_device_func *func;
     17	const struct nvkm_device_quirk *quirk;
     18	struct device *dev;
     19	enum nvkm_device_type type;
     20	u64 handle;
     21	const char *name;
     22	const char *cfgopt;
     23	const char *dbgopt;
     24
     25	struct list_head head;
     26	struct mutex mutex;
     27	int refcount;
     28
     29	void __iomem *pri;
     30
     31	struct nvkm_event event;
     32
     33	u32 debug;
     34
     35	const struct nvkm_device_chip *chip;
     36	enum {
     37		NV_04    = 0x04,
     38		NV_10    = 0x10,
     39		NV_11    = 0x11,
     40		NV_20    = 0x20,
     41		NV_30    = 0x30,
     42		NV_40    = 0x40,
     43		NV_50    = 0x50,
     44		NV_C0    = 0xc0,
     45		NV_E0    = 0xe0,
     46		GM100    = 0x110,
     47		GP100    = 0x130,
     48		GV100    = 0x140,
     49		TU100    = 0x160,
     50		GA100    = 0x170,
     51	} card_type;
     52	u32 chipset;
     53	u8  chiprev;
     54	u32 crystal;
     55
     56	struct {
     57		struct notifier_block nb;
     58	} acpi;
     59
     60#define NVKM_LAYOUT_ONCE(type,data,ptr) data *ptr;
     61#define NVKM_LAYOUT_INST(type,data,ptr,cnt) data *ptr[cnt];
     62#include <core/layout.h>
     63#undef NVKM_LAYOUT_INST
     64#undef NVKM_LAYOUT_ONCE
     65	struct list_head subdev;
     66};
     67
     68struct nvkm_subdev *nvkm_device_subdev(struct nvkm_device *, int type, int inst);
     69struct nvkm_engine *nvkm_device_engine(struct nvkm_device *, int type, int inst);
     70
     71struct nvkm_device_func {
     72	struct nvkm_device_pci *(*pci)(struct nvkm_device *);
     73	struct nvkm_device_tegra *(*tegra)(struct nvkm_device *);
     74	void *(*dtor)(struct nvkm_device *);
     75	int (*preinit)(struct nvkm_device *);
     76	int (*init)(struct nvkm_device *);
     77	void (*fini)(struct nvkm_device *, bool suspend);
     78	resource_size_t (*resource_addr)(struct nvkm_device *, unsigned bar);
     79	resource_size_t (*resource_size)(struct nvkm_device *, unsigned bar);
     80	bool cpu_coherent;
     81};
     82
     83struct nvkm_device_quirk {
     84	u8 tv_pin_mask;
     85	u8 tv_gpio;
     86};
     87
     88struct nvkm_device_chip {
     89	const char *name;
     90#define NVKM_LAYOUT_ONCE(type,data,ptr,...)                                                  \
     91	struct {                                                                             \
     92		u32 inst;                                                                    \
     93		int (*ctor)(struct nvkm_device *, enum nvkm_subdev_type, int inst, data **); \
     94	} ptr;
     95#define NVKM_LAYOUT_INST(A...) NVKM_LAYOUT_ONCE(A)
     96#include <core/layout.h>
     97#undef NVKM_LAYOUT_INST
     98#undef NVKM_LAYOUT_ONCE
     99};
    100
    101struct nvkm_device *nvkm_device_find(u64 name);
    102int nvkm_device_list(u64 *name, int size);
    103
    104/* privileged register interface accessor macros */
    105#define nvkm_rd08(d,a) ioread8((d)->pri + (a))
    106#define nvkm_rd16(d,a) ioread16_native((d)->pri + (a))
    107#define nvkm_rd32(d,a) ioread32_native((d)->pri + (a))
    108#define nvkm_wr08(d,a,v) iowrite8((v), (d)->pri + (a))
    109#define nvkm_wr16(d,a,v) iowrite16_native((v), (d)->pri + (a))
    110#define nvkm_wr32(d,a,v) iowrite32_native((v), (d)->pri + (a))
    111#define nvkm_mask(d,a,m,v) ({                                                  \
    112	struct nvkm_device *_device = (d);                                     \
    113	u32 _addr = (a), _temp = nvkm_rd32(_device, _addr);                    \
    114	nvkm_wr32(_device, _addr, (_temp & ~(m)) | (v));                       \
    115	_temp;                                                                 \
    116})
    117
    118void nvkm_device_del(struct nvkm_device **);
    119
    120struct nvkm_device_oclass {
    121	int (*ctor)(struct nvkm_device *, const struct nvkm_oclass *,
    122		    void *data, u32 size, struct nvkm_object **);
    123	struct nvkm_sclass base;
    124};
    125
    126extern const struct nvkm_sclass nvkm_udevice_sclass;
    127
    128/* device logging */
    129#define nvdev_printk_(d,l,p,f,a...) do {                                       \
    130	const struct nvkm_device *_device = (d);                               \
    131	if (_device->debug >= (l))                                             \
    132		dev_##p(_device->dev, f, ##a);                                 \
    133} while(0)
    134#define nvdev_printk(d,l,p,f,a...) nvdev_printk_((d), NV_DBG_##l, p, f, ##a)
    135#define nvdev_fatal(d,f,a...) nvdev_printk((d), FATAL,   crit, f, ##a)
    136#define nvdev_error(d,f,a...) nvdev_printk((d), ERROR,    err, f, ##a)
    137#define nvdev_warn(d,f,a...)  nvdev_printk((d),  WARN, notice, f, ##a)
    138#define nvdev_info(d,f,a...)  nvdev_printk((d),  INFO,   info, f, ##a)
    139#define nvdev_debug(d,f,a...) nvdev_printk((d), DEBUG,   info, f, ##a)
    140#define nvdev_trace(d,f,a...) nvdev_printk((d), TRACE,   info, f, ##a)
    141#define nvdev_spam(d,f,a...)  nvdev_printk((d),  SPAM,    dbg, f, ##a)
    142#endif