cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

nouveau_bo5039.c (4630B)


      1/*
      2 * Copyright 2007 Dave Airlied
      3 * All Rights Reserved.
      4 *
      5 * Permission is hereby granted, free of charge, to any person obtaining a
      6 * copy of this software and associated documentation files (the "Software"),
      7 * to deal in the Software without restriction, including without limitation
      8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      9 * and/or sell copies of the Software, and to permit persons to whom the
     10 * Software is furnished to do so, subject to the following conditions:
     11 *
     12 * The above copyright notice and this permission notice (including the next
     13 * paragraph) shall be included in all copies or substantial portions of the
     14 * Software.
     15 *
     16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22 * OTHER DEALINGS IN THE SOFTWARE.
     23 */
     24/*
     25 * Authors: Dave Airlied <airlied@linux.ie>
     26 *	    Ben Skeggs   <darktama@iinet.net.au>
     27 *	    Jeremy Kolb  <jkolb@brandeis.edu>
     28 */
     29#include "nouveau_bo.h"
     30#include "nouveau_dma.h"
     31#include "nouveau_drv.h"
     32#include "nouveau_mem.h"
     33
     34#include <nvif/push206e.h>
     35
     36#include <nvhw/class/cl5039.h>
     37
     38int
     39nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
     40		  struct ttm_resource *old_reg, struct ttm_resource *new_reg)
     41{
     42	struct nouveau_mem *mem = nouveau_mem(old_reg);
     43	struct nvif_push *push = chan->chan.push;
     44	u64 length = (new_reg->num_pages << PAGE_SHIFT);
     45	u64 src_offset = mem->vma[0].addr;
     46	u64 dst_offset = mem->vma[1].addr;
     47	int src_tiled = !!mem->kind;
     48	int dst_tiled = !!nouveau_mem(new_reg)->kind;
     49	int ret;
     50
     51	while (length) {
     52		u32 amount, stride, height;
     53
     54		ret = PUSH_WAIT(push, 18 + 6 * (src_tiled + dst_tiled));
     55		if (ret)
     56			return ret;
     57
     58		amount  = min(length, (u64)(4 * 1024 * 1024));
     59		stride  = 16 * 4;
     60		height  = amount / stride;
     61
     62		if (src_tiled) {
     63			PUSH_MTHD(push, NV5039, SET_SRC_MEMORY_LAYOUT,
     64				  NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, BLOCKLINEAR),
     65
     66						SET_SRC_BLOCK_SIZE,
     67				  NVDEF(NV5039, SET_SRC_BLOCK_SIZE, WIDTH, ONE_GOB) |
     68				  NVDEF(NV5039, SET_SRC_BLOCK_SIZE, HEIGHT, ONE_GOB) |
     69				  NVDEF(NV5039, SET_SRC_BLOCK_SIZE, DEPTH, ONE_GOB),
     70
     71						SET_SRC_WIDTH, stride,
     72						SET_SRC_HEIGHT, height,
     73						SET_SRC_DEPTH, 1,
     74						SET_SRC_LAYER, 0,
     75
     76						SET_SRC_ORIGIN,
     77				  NVVAL(NV5039, SET_SRC_ORIGIN, X, 0) |
     78				  NVVAL(NV5039, SET_SRC_ORIGIN, Y, 0));
     79		} else {
     80			PUSH_MTHD(push, NV5039, SET_SRC_MEMORY_LAYOUT,
     81				  NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, PITCH));
     82		}
     83
     84		if (dst_tiled) {
     85			PUSH_MTHD(push, NV5039, SET_DST_MEMORY_LAYOUT,
     86				  NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, BLOCKLINEAR),
     87
     88						SET_DST_BLOCK_SIZE,
     89				  NVDEF(NV5039, SET_DST_BLOCK_SIZE, WIDTH, ONE_GOB) |
     90				  NVDEF(NV5039, SET_DST_BLOCK_SIZE, HEIGHT, ONE_GOB) |
     91				  NVDEF(NV5039, SET_DST_BLOCK_SIZE, DEPTH, ONE_GOB),
     92
     93						SET_DST_WIDTH, stride,
     94						SET_DST_HEIGHT, height,
     95						SET_DST_DEPTH, 1,
     96						SET_DST_LAYER, 0,
     97
     98						SET_DST_ORIGIN,
     99				  NVVAL(NV5039, SET_DST_ORIGIN, X, 0) |
    100				  NVVAL(NV5039, SET_DST_ORIGIN, Y, 0));
    101		} else {
    102			PUSH_MTHD(push, NV5039, SET_DST_MEMORY_LAYOUT,
    103				  NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, PITCH));
    104		}
    105
    106		PUSH_MTHD(push, NV5039, OFFSET_IN_UPPER,
    107			  NVVAL(NV5039, OFFSET_IN_UPPER, VALUE, upper_32_bits(src_offset)),
    108
    109					OFFSET_OUT_UPPER,
    110			  NVVAL(NV5039, OFFSET_OUT_UPPER, VALUE, upper_32_bits(dst_offset)));
    111
    112		PUSH_MTHD(push, NV5039, OFFSET_IN, lower_32_bits(src_offset),
    113					OFFSET_OUT, lower_32_bits(dst_offset),
    114					PITCH_IN, stride,
    115					PITCH_OUT, stride,
    116					LINE_LENGTH_IN, stride,
    117					LINE_COUNT, height,
    118
    119					FORMAT,
    120			  NVDEF(NV5039, FORMAT, IN, ONE) |
    121			  NVDEF(NV5039, FORMAT, OUT, ONE),
    122
    123					BUFFER_NOTIFY,
    124			  NVDEF(NV5039, BUFFER_NOTIFY, TYPE, WRITE_ONLY));
    125
    126		PUSH_MTHD(push, NV5039, NO_OPERATION, 0x00000000);
    127
    128		length -= amount;
    129		src_offset += amount;
    130		dst_offset += amount;
    131	}
    132
    133	return 0;
    134}
    135
    136int
    137nv50_bo_move_init(struct nouveau_channel *chan, u32 handle)
    138{
    139	struct nvif_push *push = chan->chan.push;
    140	int ret;
    141
    142	ret = PUSH_WAIT(push, 6);
    143	if (ret)
    144		return ret;
    145
    146	PUSH_MTHD(push, NV5039, SET_OBJECT, handle);
    147	PUSH_MTHD(push, NV5039, SET_CONTEXT_DMA_NOTIFY, chan->drm->ntfy.handle,
    148				SET_CONTEXT_DMA_BUFFER_IN, chan->vram.handle,
    149				SET_CONTEXT_DMA_BUFFER_OUT, chan->vram.handle);
    150	return 0;
    151}