cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

nouveau_boa0b5.c (3107B)

      1/*
      2 * Copyright 2007 Dave Airlied
      3 * All Rights Reserved.
      4 *
      5 * Permission is hereby granted, free of charge, to any person obtaining a
      6 * copy of this software and associated documentation files (the "Software"),
      7 * to deal in the Software without restriction, including without limitation
      8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      9 * and/or sell copies of the Software, and to permit persons to whom the
     10 * Software is furnished to do so, subject to the following conditions:
     11 *
     12 * The above copyright notice and this permission notice (including the next
     13 * paragraph) shall be included in all copies or substantial portions of the
     14 * Software.
     15 *
     16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22 * OTHER DEALINGS IN THE SOFTWARE.
     23 */
     24/*
     25 * Authors: Dave Airlied <airlied@linux.ie>
     26 *	    Ben Skeggs   <darktama@iinet.net.au>
     27 *	    Jeremy Kolb  <jkolb@brandeis.edu>
     28 */
     29#include "nouveau_bo.h"
     30#include "nouveau_dma.h"
     31#include "nouveau_mem.h"
     32
     33#include <nvif/push906f.h>
     34
     35#include <nvhw/class/cla0b5.h>
     36
     37int
     38nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
     39		  struct ttm_resource *old_reg, struct ttm_resource *new_reg)
     40{
     41	struct nouveau_mem *mem = nouveau_mem(old_reg);
     42	struct nvif_push *push = chan->chan.push;
     43	int ret;
     44
     45	ret = PUSH_WAIT(push, 10);
     46	if (ret)
     47		return ret;
     48
     49	PUSH_MTHD(push, NVA0B5, OFFSET_IN_UPPER,
     50		  NVVAL(NVA0B5, OFFSET_IN_UPPER, UPPER, upper_32_bits(mem->vma[0].addr)),
     51
     52				OFFSET_IN_LOWER, lower_32_bits(mem->vma[0].addr),
     53
     54				OFFSET_OUT_UPPER,
     55		  NVVAL(NVA0B5, OFFSET_OUT_UPPER, UPPER, upper_32_bits(mem->vma[1].addr)),
     56
     57				OFFSET_OUT_LOWER, lower_32_bits(mem->vma[1].addr),
     58				PITCH_IN, PAGE_SIZE,
     59				PITCH_OUT, PAGE_SIZE,
     60				LINE_LENGTH_IN, PAGE_SIZE,
     61				LINE_COUNT, new_reg->num_pages);
     62
     63	PUSH_IMMD(push, NVA0B5, LAUNCH_DMA,
     64		  NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) |
     65		  NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) |
     66		  NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) |
     67		  NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) |
     68		  NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) |
     69		  NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) |
     70		  NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) |
     71		  NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, FALSE) |
     72		  NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING) |
     73		  NVDEF(NVA0B5, LAUNCH_DMA, SRC_TYPE, VIRTUAL) |
     74		  NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, VIRTUAL));
     75	return 0;
     76}
     77
     78int
     79nve0_bo_move_init(struct nouveau_channel *chan, u32 handle)
     80{
     81	struct nvif_push *push = chan->chan.push;
     82	int ret;
     83
     84	ret = PUSH_WAIT(push, 2);
     85	if (ret)
     86		return ret;
     87
     88	PUSH_NVSQ(push, NVA0B5, 0x0000, handle & 0x0000ffff);
     89	return 0;
     90}