cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

nvc0_fbcon.c (8896B)


      1/*
      2 * Copyright 2010 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Ben Skeggs
     23 */
     24#define NVIF_DEBUG_PRINT_DISABLE
     25#include "nouveau_drv.h"
     26#include "nouveau_dma.h"
     27#include "nouveau_fbcon.h"
     28#include "nouveau_vmm.h"
     29
     30#include <nvif/push906f.h>
     31
     32#include <nvhw/class/cl902d.h>
     33
     34int
     35nvc0_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
     36{
     37	struct nouveau_fbdev *nfbdev = info->par;
     38	struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
     39	struct nouveau_channel *chan = drm->channel;
     40	struct nvif_push *push = chan->chan.push;
     41	u32 colour;
     42	int ret;
     43
     44	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
     45	    info->fix.visual == FB_VISUAL_DIRECTCOLOR)
     46		colour = ((uint32_t *)info->pseudo_palette)[rect->color];
     47	else
     48		colour = rect->color;
     49
     50	ret = PUSH_WAIT(push, rect->rop == ROP_COPY ? 7 : 9);
     51	if (ret)
     52		return ret;
     53
     54	if (rect->rop != ROP_COPY) {
     55		PUSH_IMMD(push, NV902D, SET_OPERATION,
     56			  NVDEF(NV902D, SET_OPERATION, V, ROP_AND));
     57	}
     58
     59	PUSH_MTHD(push, NV902D, SET_RENDER_SOLID_PRIM_COLOR, colour);
     60
     61	PUSH_MTHD(push, NV902D, RENDER_SOLID_PRIM_POINT_SET_X(0), rect->dx,
     62				RENDER_SOLID_PRIM_POINT_Y(0), rect->dy,
     63				RENDER_SOLID_PRIM_POINT_SET_X(1), rect->dx + rect->width,
     64				RENDER_SOLID_PRIM_POINT_Y(1), rect->dy + rect->height);
     65
     66	if (rect->rop != ROP_COPY) {
     67		PUSH_IMMD(push, NV902D, SET_OPERATION,
     68			  NVDEF(NV902D, SET_OPERATION, V, SRCCOPY));
     69	}
     70
     71	PUSH_KICK(push);
     72	return 0;
     73}
     74
     75int
     76nvc0_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
     77{
     78	struct nouveau_fbdev *nfbdev = info->par;
     79	struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
     80	struct nouveau_channel *chan = drm->channel;
     81	struct nvif_push *push = chan->chan.push;
     82	int ret;
     83
     84	ret = PUSH_WAIT(push, 11);
     85	if (ret)
     86		return ret;
     87
     88	PUSH_IMMD(push, NV902D, WAIT_FOR_IDLE, 0);
     89
     90	PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_DST_X0, region->dx,
     91				SET_PIXELS_FROM_MEMORY_DST_Y0, region->dy,
     92				SET_PIXELS_FROM_MEMORY_DST_WIDTH, region->width,
     93				SET_PIXELS_FROM_MEMORY_DST_HEIGHT, region->height);
     94
     95	PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC, 0,
     96				SET_PIXELS_FROM_MEMORY_SRC_X0_INT, region->sx,
     97				SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC, 0,
     98				PIXELS_FROM_MEMORY_SRC_Y0_INT, region->sy);
     99	PUSH_KICK(push);
    100	return 0;
    101}
    102
    103int
    104nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
    105{
    106	struct nouveau_fbdev *nfbdev = info->par;
    107	struct nouveau_drm *drm = nouveau_drm(nfbdev->helper.dev);
    108	struct nouveau_channel *chan = drm->channel;
    109	struct nvif_push *push = chan->chan.push;
    110	uint32_t dwords, *data = (uint32_t *)image->data;
    111	uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
    112	uint32_t *palette = info->pseudo_palette, bg, fg;
    113	int ret;
    114
    115	if (image->depth != 1)
    116		return -ENODEV;
    117
    118	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
    119	    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
    120		bg = palette[image->bg_color] | mask;
    121		fg = palette[image->fg_color] | mask;
    122	} else {
    123		bg = image->bg_color;
    124		fg = image->fg_color;
    125	}
    126
    127	ret = PUSH_WAIT(push, 11);
    128	if (ret)
    129		return ret;
    130
    131	PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_CPU_COLOR0, bg,
    132				SET_PIXELS_FROM_CPU_COLOR1, fg);
    133
    134	PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_CPU_SRC_WIDTH, image->width,
    135				SET_PIXELS_FROM_CPU_SRC_HEIGHT, image->height);
    136
    137	PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_CPU_DST_X0_FRAC, 0,
    138				SET_PIXELS_FROM_CPU_DST_X0_INT, image->dx,
    139				SET_PIXELS_FROM_CPU_DST_Y0_FRAC, 0,
    140				SET_PIXELS_FROM_CPU_DST_Y0_INT, image->dy);
    141
    142	dwords = ALIGN(ALIGN(image->width, 8) * image->height, 32) >> 5;
    143	while (dwords) {
    144		int count = dwords > 2047 ? 2047 : dwords;
    145
    146		ret = PUSH_WAIT(push, count + 1);
    147		if (ret)
    148			return ret;
    149
    150		dwords -= count;
    151
    152		PUSH_NINC(push, NV902D, PIXELS_FROM_CPU_DATA, data, count);
    153		data += count;
    154	}
    155
    156	PUSH_KICK(push);
    157	return 0;
    158}
    159
    160int
    161nvc0_fbcon_accel_init(struct fb_info *info)
    162{
    163	struct nouveau_fbdev *nfbdev = info->par;
    164	struct drm_device *dev = nfbdev->helper.dev;
    165	struct nouveau_drm *drm = nouveau_drm(dev);
    166	struct nouveau_channel *chan = drm->channel;
    167	struct nvif_push *push = chan->chan.push;
    168	int ret, format;
    169
    170	ret = nvif_object_ctor(&chan->user, "fbconTwoD", 0x902d, 0x902d,
    171			       NULL, 0, &nfbdev->twod);
    172	if (ret)
    173		return ret;
    174
    175	switch (info->var.bits_per_pixel) {
    176	case 8:
    177		format = NV902D_SET_DST_FORMAT_V_Y8;
    178		break;
    179	case 15:
    180		format = NV902D_SET_DST_FORMAT_V_X1R5G5B5;
    181		break;
    182	case 16:
    183		format = NV902D_SET_DST_FORMAT_V_R5G6B5;
    184		break;
    185	case 32:
    186		switch (info->var.transp.length) {
    187		case 0: /* depth 24 */
    188		case 8: /* depth 32, just use 24.. */
    189			format = NV902D_SET_DST_FORMAT_V_X8R8G8B8;
    190			break;
    191		case 2: /* depth 30 */
    192			format = NV902D_SET_DST_FORMAT_V_A2B10G10R10;
    193			break;
    194		default:
    195			return -EINVAL;
    196		}
    197		break;
    198	default:
    199		return -EINVAL;
    200	}
    201
    202	ret = PUSH_WAIT(push, 52);
    203	if (ret) {
    204		WARN_ON(1);
    205		nouveau_fbcon_gpu_lockup(info);
    206		return ret;
    207	}
    208
    209	PUSH_MTHD(push, NV902D, SET_OBJECT, nfbdev->twod.handle);
    210
    211	PUSH_MTHD(push, NV902D, SET_DST_FORMAT,
    212		  NVVAL(NV902D, SET_DST_FORMAT, V, format),
    213
    214				SET_DST_MEMORY_LAYOUT,
    215		  NVDEF(NV902D, SET_DST_MEMORY_LAYOUT, V, PITCH));
    216
    217	PUSH_MTHD(push, NV902D, SET_DST_PITCH, info->fix.line_length,
    218				SET_DST_WIDTH, info->var.xres_virtual,
    219				SET_DST_HEIGHT, info->var.yres_virtual,
    220
    221				SET_DST_OFFSET_UPPER,
    222		  NVVAL(NV902D, SET_DST_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)),
    223
    224				SET_DST_OFFSET_LOWER,
    225		  NVVAL(NV902D, SET_DST_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr)));
    226
    227	PUSH_MTHD(push, NV902D, SET_SRC_FORMAT,
    228		  NVVAL(NV902D, SET_SRC_FORMAT, V, format),
    229
    230				SET_SRC_MEMORY_LAYOUT,
    231		  NVDEF(NV902D, SET_SRC_MEMORY_LAYOUT, V, PITCH));
    232
    233	PUSH_MTHD(push, NV902D, SET_SRC_PITCH, info->fix.line_length,
    234				SET_SRC_WIDTH, info->var.xres_virtual,
    235				SET_SRC_HEIGHT, info->var.yres_virtual,
    236
    237				SET_SRC_OFFSET_UPPER,
    238		  NVVAL(NV902D, SET_SRC_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)),
    239
    240				SET_SRC_OFFSET_LOWER,
    241		  NVVAL(NV902D, SET_SRC_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr)));
    242
    243	PUSH_IMMD(push, NV902D, SET_CLIP_ENABLE,
    244		  NVDEF(NV902D, SET_CLIP_ENABLE, V, FALSE));
    245
    246	PUSH_IMMD(push, NV902D, SET_ROP,
    247		  NVVAL(NV902D, SET_ROP, V, 0x55));
    248
    249	PUSH_IMMD(push, NV902D, SET_OPERATION,
    250		  NVDEF(NV902D, SET_OPERATION, V, SRCCOPY));
    251
    252	PUSH_MTHD(push, NV902D, SET_MONOCHROME_PATTERN_COLOR_FORMAT,
    253		  NVDEF(NV902D, SET_MONOCHROME_PATTERN_COLOR_FORMAT, V, A8R8G8B8),
    254
    255				SET_MONOCHROME_PATTERN_FORMAT,
    256		  NVDEF(NV902D, SET_MONOCHROME_PATTERN_FORMAT, V, LE_M1));
    257
    258	PUSH_MTHD(push, NV902D, RENDER_SOLID_PRIM_MODE,
    259		  NVDEF(NV902D, RENDER_SOLID_PRIM_MODE, V, RECTS),
    260
    261				SET_RENDER_SOLID_PRIM_COLOR_FORMAT,
    262		  NVVAL(NV902D, SET_RENDER_SOLID_PRIM_COLOR_FORMAT, V, format));
    263
    264	PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_CPU_DATA_TYPE,
    265		  NVDEF(NV902D, SET_PIXELS_FROM_CPU_DATA_TYPE, V, INDEX),
    266
    267				SET_PIXELS_FROM_CPU_COLOR_FORMAT,
    268		  NVVAL(NV902D, SET_PIXELS_FROM_CPU_COLOR_FORMAT, V, format),
    269
    270				SET_PIXELS_FROM_CPU_INDEX_FORMAT,
    271		  NVDEF(NV902D, SET_PIXELS_FROM_CPU_INDEX_FORMAT, V, I1),
    272
    273				SET_PIXELS_FROM_CPU_MONO_FORMAT,
    274		  NVDEF(NV902D, SET_PIXELS_FROM_CPU_MONO_FORMAT, V, CGA6_M1),
    275
    276				SET_PIXELS_FROM_CPU_WRAP,
    277		  NVDEF(NV902D, SET_PIXELS_FROM_CPU_WRAP, V, WRAP_BYTE));
    278
    279	PUSH_IMMD(push, NV902D, SET_PIXELS_FROM_CPU_MONO_OPACITY,
    280		  NVDEF(NV902D, SET_PIXELS_FROM_CPU_MONO_OPACITY, V, OPAQUE));
    281
    282	PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_CPU_DX_DU_FRAC, 0,
    283				SET_PIXELS_FROM_CPU_DX_DU_INT, 1,
    284				SET_PIXELS_FROM_CPU_DY_DV_FRAC, 0,
    285				SET_PIXELS_FROM_CPU_DY_DV_INT, 1);
    286
    287	PUSH_IMMD(push, NV902D, SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP,
    288		  NVDEF(NV902D, SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP, V, TRUE));
    289
    290	PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_DU_DX_FRAC, 0,
    291				SET_PIXELS_FROM_MEMORY_DU_DX_INT, 1,
    292				SET_PIXELS_FROM_MEMORY_DV_DY_FRAC, 0,
    293				SET_PIXELS_FROM_MEMORY_DV_DY_INT, 1);
    294	PUSH_KICK(push);
    295	return 0;
    296}
    297