cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

basegf119.c (3026B)

      1/*
      2 * Copyright 2012 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Ben Skeggs
     23 */
     24#include "channv50.h"
     25
     26static const struct nv50_disp_mthd_list
     27gf119_disp_base_mthd_base = {
     28	.mthd = 0x0000,
     29	.addr = 0x000000,
     30	.data = {
     31		{ 0x0080, 0x661080 },
     32		{ 0x0084, 0x661084 },
     33		{ 0x0088, 0x661088 },
     34		{ 0x008c, 0x66108c },
     35		{ 0x0090, 0x661090 },
     36		{ 0x0094, 0x661094 },
     37		{ 0x00a0, 0x6610a0 },
     38		{ 0x00a4, 0x6610a4 },
     39		{ 0x00c0, 0x6610c0 },
     40		{ 0x00c4, 0x6610c4 },
     41		{ 0x00c8, 0x6610c8 },
     42		{ 0x00cc, 0x6610cc },
     43		{ 0x00e0, 0x6610e0 },
     44		{ 0x00e4, 0x6610e4 },
     45		{ 0x00e8, 0x6610e8 },
     46		{ 0x00ec, 0x6610ec },
     47		{ 0x00fc, 0x6610fc },
     48		{ 0x0100, 0x661100 },
     49		{ 0x0104, 0x661104 },
     50		{ 0x0108, 0x661108 },
     51		{ 0x010c, 0x66110c },
     52		{ 0x0110, 0x661110 },
     53		{ 0x0114, 0x661114 },
     54		{ 0x0118, 0x661118 },
     55		{ 0x011c, 0x66111c },
     56		{ 0x0130, 0x661130 },
     57		{ 0x0134, 0x661134 },
     58		{ 0x0138, 0x661138 },
     59		{ 0x013c, 0x66113c },
     60		{ 0x0140, 0x661140 },
     61		{ 0x0144, 0x661144 },
     62		{ 0x0148, 0x661148 },
     63		{ 0x014c, 0x66114c },
     64		{ 0x0150, 0x661150 },
     65		{ 0x0154, 0x661154 },
     66		{ 0x0158, 0x661158 },
     67		{ 0x015c, 0x66115c },
     68		{ 0x0160, 0x661160 },
     69		{ 0x0164, 0x661164 },
     70		{ 0x0168, 0x661168 },
     71		{ 0x016c, 0x66116c },
     72		{}
     73	}
     74};
     75
     76static const struct nv50_disp_mthd_list
     77gf119_disp_base_mthd_image = {
     78	.mthd = 0x0020,
     79	.addr = 0x000020,
     80	.data = {
     81		{ 0x0400, 0x661400 },
     82		{ 0x0404, 0x661404 },
     83		{ 0x0408, 0x661408 },
     84		{ 0x040c, 0x66140c },
     85		{ 0x0410, 0x661410 },
     86		{}
     87	}
     88};
     89
     90const struct nv50_disp_chan_mthd
     91gf119_disp_base_mthd = {
     92	.name = "Base",
     93	.addr = 0x001000,
     94	.prev = -0x020000,
     95	.data = {
     96		{ "Global", 1, &gf119_disp_base_mthd_base },
     97		{  "Image", 2, &gf119_disp_base_mthd_image },
     98		{}
     99	}
    100};
    101
    102int
    103gf119_disp_base_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
    104		    struct nv50_disp *disp, struct nvkm_object **pobject)
    105{
    106	return nv50_disp_base_new_(&gf119_disp_dmac_func, &gf119_disp_base_mthd,
    107				   disp, 1, oclass, argv, argc, pobject);
    108}