cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dacnv50.c (3589B)

      1/*
      2 * Copyright 2012 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Ben Skeggs
     23 */
     24#include "ior.h"
     25
     26#include <subdev/timer.h>
     27
     28static void
     29nv50_dac_clock(struct nvkm_ior *dac)
     30{
     31	struct nvkm_device *device = dac->disp->engine.subdev.device;
     32	const u32 doff = nv50_ior_base(dac);
     33	nvkm_mask(device, 0x614280 + doff, 0x07070707, 0x00000000);
     34}
     35
     36int
     37nv50_dac_sense(struct nvkm_ior *dac, u32 loadval)
     38{
     39	struct nvkm_device *device = dac->disp->engine.subdev.device;
     40	const u32 doff = nv50_ior_base(dac);
     41
     42	dac->func->power(dac, false, true, false, false, false);
     43
     44	nvkm_wr32(device, 0x61a00c + doff, 0x00100000 | loadval);
     45	mdelay(9);
     46	udelay(500);
     47	loadval = nvkm_mask(device, 0x61a00c + doff, 0xffffffff, 0x00000000);
     48
     49	dac->func->power(dac, false, false, false, false, false);
     50	if (!(loadval & 0x80000000))
     51		return -ETIMEDOUT;
     52
     53	return (loadval & 0x38000000) >> 27;
     54}
     55
     56static void
     57nv50_dac_power_wait(struct nvkm_device *device, const u32 doff)
     58{
     59	nvkm_msec(device, 2000,
     60		if (!(nvkm_rd32(device, 0x61a004 + doff) & 0x80000000))
     61			break;
     62	);
     63}
     64
     65void
     66nv50_dac_power(struct nvkm_ior *dac, bool normal, bool pu,
     67	       bool data, bool vsync, bool hsync)
     68{
     69	struct nvkm_device *device = dac->disp->engine.subdev.device;
     70	const u32  doff = nv50_ior_base(dac);
     71	const u32 shift = normal ? 0 : 16;
     72	const u32 state = 0x80000000 | (0x00000040 * !    pu |
     73					0x00000010 * !  data |
     74					0x00000004 * ! vsync |
     75					0x00000001 * ! hsync) << shift;
     76	const u32 field = 0xc0000000 | (0x00000055 << shift);
     77
     78	nv50_dac_power_wait(device, doff);
     79	nvkm_mask(device, 0x61a004 + doff, field, state);
     80	nv50_dac_power_wait(device, doff);
     81}
     82
     83static void
     84nv50_dac_state(struct nvkm_ior *dac, struct nvkm_ior_state *state)
     85{
     86	struct nvkm_device *device = dac->disp->engine.subdev.device;
     87	const u32 coff = dac->id * 8 + (state == &dac->arm) * 4;
     88	u32 ctrl = nvkm_rd32(device, 0x610b58 + coff);
     89
     90	state->proto_evo = (ctrl & 0x00000f00) >> 8;
     91	switch (state->proto_evo) {
     92	case 0: state->proto = CRT; break;
     93	default:
     94		state->proto = UNKNOWN;
     95		break;
     96	}
     97
     98	state->head = ctrl & 0x00000003;
     99}
    100
    101static const struct nvkm_ior_func
    102nv50_dac = {
    103	.state = nv50_dac_state,
    104	.power = nv50_dac_power,
    105	.sense = nv50_dac_sense,
    106	.clock = nv50_dac_clock,
    107};
    108
    109int
    110nv50_dac_new(struct nvkm_disp *disp, int id)
    111{
    112	return nvkm_ior_new_(&nv50_dac, disp, DAC, id);
    113}
    114
    115int
    116nv50_dac_cnt(struct nvkm_disp *disp, unsigned long *pmask)
    117{
    118	struct nvkm_device *device = disp->engine.subdev.device;
    119	*pmask = (nvkm_rd32(device, 0x610184) & 0x00700000) >> 20;
    120	return 3;
    121}