cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

rootga102.c (1999B)

      1/*
      2 * Copyright 2021 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 */
     22#include "rootnv50.h"
     23#include "channv50.h"
     24
     25#include <nvif/class.h>
     26
     27static const struct nv50_disp_root_func
     28ga102_disp_root = {
     29	.user = {
     30		{{-1,-1,GV100_DISP_CAPS                }, gv100_disp_caps_new },
     31		{{0,0,GA102_DISP_CURSOR                }, gv100_disp_curs_new },
     32		{{0,0,GA102_DISP_WINDOW_IMM_CHANNEL_DMA}, gv100_disp_wimm_new },
     33		{{0,0,GA102_DISP_CORE_CHANNEL_DMA      }, gv100_disp_core_new },
     34		{{0,0,GA102_DISP_WINDOW_CHANNEL_DMA    }, gv100_disp_wndw_new },
     35		{}
     36	},
     37};
     38
     39static int
     40ga102_disp_root_new(struct nvkm_disp *disp, const struct nvkm_oclass *oclass,
     41		    void *data, u32 size, struct nvkm_object **pobject)
     42{
     43	return nv50_disp_root_new_(&ga102_disp_root, disp, oclass, data, size, pobject);
     44}
     45
     46const struct nvkm_disp_oclass
     47ga102_disp_root_oclass = {
     48	.base.oclass = GA102_DISP,
     49	.base.minver = -1,
     50	.base.maxver = -1,
     51	.ctor = ga102_disp_root_new,
     52};