cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

wndwgv100.c (5173B)


      1/*
      2 * Copyright 2018 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 */
     22#include "channv50.h"
     23
     24#include <core/client.h>
     25
     26#include <nvif/clc37e.h>
     27#include <nvif/unpack.h>
     28
     29static const struct nv50_disp_mthd_list
     30gv100_disp_wndw_mthd_base = {
     31	.mthd = 0x0000,
     32	.addr = 0x000000,
     33	.data = {
     34		{ 0x0200, 0x690200 },
     35		{ 0x020c, 0x69020c },
     36		{ 0x0210, 0x690210 },
     37		{ 0x0214, 0x690214 },
     38		{ 0x0218, 0x690218 },
     39		{ 0x021c, 0x69021c },
     40		{ 0x0220, 0x690220 },
     41		{ 0x0224, 0x690224 },
     42		{ 0x0228, 0x690228 },
     43		{ 0x022c, 0x69022c },
     44		{ 0x0230, 0x690230 },
     45		{ 0x0234, 0x690234 },
     46		{ 0x0238, 0x690238 },
     47		{ 0x0240, 0x690240 },
     48		{ 0x0244, 0x690244 },
     49		{ 0x0248, 0x690248 },
     50		{ 0x024c, 0x69024c },
     51		{ 0x0250, 0x690250 },
     52		{ 0x0254, 0x690254 },
     53		{ 0x0260, 0x690260 },
     54		{ 0x0264, 0x690264 },
     55		{ 0x0268, 0x690268 },
     56		{ 0x026c, 0x69026c },
     57		{ 0x0270, 0x690270 },
     58		{ 0x0274, 0x690274 },
     59		{ 0x0280, 0x690280 },
     60		{ 0x0284, 0x690284 },
     61		{ 0x0288, 0x690288 },
     62		{ 0x028c, 0x69028c },
     63		{ 0x0290, 0x690290 },
     64		{ 0x0298, 0x690298 },
     65		{ 0x029c, 0x69029c },
     66		{ 0x02a0, 0x6902a0 },
     67		{ 0x02a4, 0x6902a4 },
     68		{ 0x02a8, 0x6902a8 },
     69		{ 0x02ac, 0x6902ac },
     70		{ 0x02b0, 0x6902b0 },
     71		{ 0x02b4, 0x6902b4 },
     72		{ 0x02b8, 0x6902b8 },
     73		{ 0x02bc, 0x6902bc },
     74		{ 0x02c0, 0x6902c0 },
     75		{ 0x02c4, 0x6902c4 },
     76		{ 0x02c8, 0x6902c8 },
     77		{ 0x02cc, 0x6902cc },
     78		{ 0x02d0, 0x6902d0 },
     79		{ 0x02d4, 0x6902d4 },
     80		{ 0x02d8, 0x6902d8 },
     81		{ 0x02dc, 0x6902dc },
     82		{ 0x02e0, 0x6902e0 },
     83		{ 0x02e4, 0x6902e4 },
     84		{ 0x02e8, 0x6902e8 },
     85		{ 0x02ec, 0x6902ec },
     86		{ 0x02f0, 0x6902f0 },
     87		{ 0x02f4, 0x6902f4 },
     88		{ 0x02f8, 0x6902f8 },
     89		{ 0x02fc, 0x6902fc },
     90		{ 0x0300, 0x690300 },
     91		{ 0x0304, 0x690304 },
     92		{ 0x0308, 0x690308 },
     93		{ 0x0310, 0x690310 },
     94		{ 0x0314, 0x690314 },
     95		{ 0x0318, 0x690318 },
     96		{ 0x031c, 0x69031c },
     97		{ 0x0320, 0x690320 },
     98		{ 0x0324, 0x690324 },
     99		{ 0x0328, 0x690328 },
    100		{ 0x032c, 0x69032c },
    101		{ 0x033c, 0x69033c },
    102		{ 0x0340, 0x690340 },
    103		{ 0x0344, 0x690344 },
    104		{ 0x0348, 0x690348 },
    105		{ 0x034c, 0x69034c },
    106		{ 0x0350, 0x690350 },
    107		{ 0x0354, 0x690354 },
    108		{ 0x0358, 0x690358 },
    109		{ 0x0364, 0x690364 },
    110		{ 0x0368, 0x690368 },
    111		{ 0x036c, 0x69036c },
    112		{ 0x0370, 0x690370 },
    113		{ 0x0374, 0x690374 },
    114		{ 0x0380, 0x690380 },
    115		{}
    116	}
    117};
    118
    119static const struct nv50_disp_chan_mthd
    120gv100_disp_wndw_mthd = {
    121	.name = "Window",
    122	.addr = 0x001000,
    123	.prev = 0x000800,
    124	.data = {
    125		{ "Global", 1, &gv100_disp_wndw_mthd_base },
    126		{}
    127	}
    128};
    129
    130static void
    131gv100_disp_wndw_intr(struct nv50_disp_chan *chan, bool en)
    132{
    133	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
    134	const u32 mask = 0x00000001 << chan->head;
    135	const u32 data = en ? mask : 0;
    136	nvkm_mask(device, 0x611da4, mask, data);
    137}
    138
    139static const struct nv50_disp_chan_func
    140gv100_disp_wndw = {
    141	.init = gv100_disp_dmac_init,
    142	.fini = gv100_disp_dmac_fini,
    143	.intr = gv100_disp_wndw_intr,
    144	.user = gv100_disp_chan_user,
    145	.bind = gv100_disp_dmac_bind,
    146};
    147
    148static int
    149gv100_disp_wndw_new_(const struct nv50_disp_chan_func *func,
    150		     const struct nv50_disp_chan_mthd *mthd,
    151		     struct nv50_disp *disp, int chid,
    152		     const struct nvkm_oclass *oclass, void *argv, u32 argc,
    153		     struct nvkm_object **pobject)
    154{
    155	union {
    156		struct nvc37e_window_channel_dma_v0 v0;
    157	} *args = argv;
    158	struct nvkm_object *parent = oclass->parent;
    159	int wndw, ret = -ENOSYS;
    160	u64 push;
    161
    162	nvif_ioctl(parent, "create window channel dma size %d\n", argc);
    163	if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
    164		nvif_ioctl(parent, "create window channel dma vers %d "
    165				   "pushbuf %016llx index %d\n",
    166			   args->v0.version, args->v0.pushbuf, args->v0.index);
    167		if (!(disp->wndw.mask & BIT(args->v0.index)))
    168			return -EINVAL;
    169		push = args->v0.pushbuf;
    170		wndw = args->v0.index;
    171	} else
    172		return ret;
    173
    174	return nv50_disp_dmac_new_(func, mthd, disp, chid + wndw,
    175				   wndw, push, oclass, pobject);
    176}
    177
    178int
    179gv100_disp_wndw_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
    180		    struct nv50_disp *disp, struct nvkm_object **pobject)
    181{
    182	return gv100_disp_wndw_new_(&gv100_disp_wndw, &gv100_disp_wndw_mthd,
    183				    disp, 1, oclass, argv, argc, pobject);
    184}