gm107.c (3736B)
1/* 2 * Copyright 2016 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24#include "gk104.h" 25#include "changk104.h" 26 27#include <core/gpuobj.h> 28#include <subdev/fault.h> 29 30#include <nvif/class.h> 31 32static void 33gm107_fifo_runlist_chan(struct gk104_fifo_chan *chan, 34 struct nvkm_memory *memory, u32 offset) 35{ 36 nvkm_wo32(memory, offset + 0, chan->base.chid); 37 nvkm_wo32(memory, offset + 4, chan->base.inst->addr >> 12); 38} 39 40const struct gk104_fifo_runlist_func 41gm107_fifo_runlist = { 42 .size = 8, 43 .cgrp = gk110_fifo_runlist_cgrp, 44 .chan = gm107_fifo_runlist_chan, 45 .commit = gk104_fifo_runlist_commit, 46}; 47 48const struct nvkm_enum 49gm107_fifo_fault_engine[] = { 50 { 0x01, "DISPLAY" }, 51 { 0x02, "CAPTURE" }, 52 { 0x03, "IFB", NULL, NVKM_ENGINE_IFB }, 53 { 0x04, "BAR1", NULL, NVKM_SUBDEV_BAR }, 54 { 0x05, "BAR2", NULL, NVKM_SUBDEV_INSTMEM }, 55 { 0x06, "SCHED" }, 56 { 0x07, "HOST0", NULL, NVKM_ENGINE_FIFO }, 57 { 0x08, "HOST1", NULL, NVKM_ENGINE_FIFO }, 58 { 0x09, "HOST2", NULL, NVKM_ENGINE_FIFO }, 59 { 0x0a, "HOST3", NULL, NVKM_ENGINE_FIFO }, 60 { 0x0b, "HOST4", NULL, NVKM_ENGINE_FIFO }, 61 { 0x0c, "HOST5", NULL, NVKM_ENGINE_FIFO }, 62 { 0x0d, "HOST6", NULL, NVKM_ENGINE_FIFO }, 63 { 0x0e, "HOST7", NULL, NVKM_ENGINE_FIFO }, 64 { 0x0f, "HOSTSR" }, 65 { 0x13, "PERF" }, 66 { 0x17, "PMU" }, 67 { 0x18, "PTP" }, 68 {} 69}; 70 71void 72gm107_fifo_intr_fault(struct nvkm_fifo *fifo, int unit) 73{ 74 struct nvkm_device *device = fifo->engine.subdev.device; 75 u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10)); 76 u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10)); 77 u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10)); 78 u32 type = nvkm_rd32(device, 0x00280c + (unit * 0x10)); 79 struct nvkm_fault_data info; 80 81 info.inst = (u64)inst << 12; 82 info.addr = ((u64)vahi << 32) | valo; 83 info.time = 0; 84 info.engine = unit; 85 info.valid = 1; 86 info.gpc = (type & 0x1f000000) >> 24; 87 info.client = (type & 0x00003f00) >> 8; 88 info.access = (type & 0x00000080) >> 7; 89 info.hub = (type & 0x00000040) >> 6; 90 info.reason = (type & 0x0000000f); 91 92 nvkm_fifo_fault(fifo, &info); 93} 94 95static const struct gk104_fifo_func 96gm107_fifo = { 97 .intr.fault = gm107_fifo_intr_fault, 98 .pbdma = &gk208_fifo_pbdma, 99 .fault.access = gk104_fifo_fault_access, 100 .fault.engine = gm107_fifo_fault_engine, 101 .fault.reason = gk104_fifo_fault_reason, 102 .fault.hubclient = gk104_fifo_fault_hubclient, 103 .fault.gpcclient = gk104_fifo_fault_gpcclient, 104 .runlist = &gm107_fifo_runlist, 105 .chan = {{0,0,KEPLER_CHANNEL_GPFIFO_B}, gk104_fifo_gpfifo_new }, 106}; 107 108int 109gm107_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, 110 struct nvkm_fifo **pfifo) 111{ 112 return gk104_fifo_new_(&gm107_fifo, device, type, inst, 2048, pfifo); 113}