cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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gf119.c (6610B)


      1/*
      2 * Copyright 2013 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Ben Skeggs <bskeggs@redhat.com>
     23 */
     24#include "gf100.h"
     25#include "ctxgf100.h"
     26
     27#include <nvif/class.h>
     28
     29/*******************************************************************************
     30 * PGRAPH register lists
     31 ******************************************************************************/
     32
     33const struct gf100_gr_init
     34gf119_gr_init_pd_0[] = {
     35	{ 0x406024,   1, 0x04, 0x00000000 },
     36	{ 0x4064f0,   3, 0x04, 0x00000000 },
     37	{}
     38};
     39
     40const struct gf100_gr_init
     41gf119_gr_init_ds_0[] = {
     42	{ 0x405844,   1, 0x04, 0x00ffffff },
     43	{ 0x405850,   1, 0x04, 0x00000000 },
     44	{ 0x405900,   1, 0x04, 0x00002834 },
     45	{ 0x405908,   1, 0x04, 0x00000000 },
     46	{ 0x405928,   2, 0x04, 0x00000000 },
     47	{}
     48};
     49
     50const struct gf100_gr_init
     51gf119_gr_init_prop_0[] = {
     52	{ 0x418408,   1, 0x04, 0x00000000 },
     53	{ 0x4184a0,   3, 0x04, 0x00000000 },
     54	{}
     55};
     56
     57const struct gf100_gr_init
     58gf119_gr_init_gpm_0[] = {
     59	{ 0x418c04,   1, 0x04, 0x00000000 },
     60	{ 0x418c64,   2, 0x04, 0x00000000 },
     61	{ 0x418c88,   1, 0x04, 0x00000000 },
     62	{ 0x418cb4,   2, 0x04, 0x00000000 },
     63	{}
     64};
     65
     66const struct gf100_gr_init
     67gf119_gr_init_gpc_unk_1[] = {
     68	{ 0x418d00,   1, 0x04, 0x00000000 },
     69	{ 0x418d28,   2, 0x04, 0x00000000 },
     70	{ 0x418f00,   1, 0x04, 0x00000000 },
     71	{ 0x418f08,   1, 0x04, 0x00000000 },
     72	{ 0x418f20,   2, 0x04, 0x00000000 },
     73	{ 0x418e00,   1, 0x04, 0x00000003 },
     74	{ 0x418e08,   1, 0x04, 0x00000000 },
     75	{ 0x418e1c,   2, 0x04, 0x00000000 },
     76	{}
     77};
     78
     79const struct gf100_gr_init
     80gf119_gr_init_tex_0[] = {
     81	{ 0x419ab0,   1, 0x04, 0x00000000 },
     82	{ 0x419ac8,   1, 0x04, 0x00000000 },
     83	{ 0x419ab8,   1, 0x04, 0x000000e7 },
     84	{ 0x419abc,   2, 0x04, 0x00000000 },
     85	{ 0x419ab4,   1, 0x04, 0x00000000 },
     86	{}
     87};
     88
     89static const struct gf100_gr_init
     90gf119_gr_init_pe_0[] = {
     91	{ 0x41980c,   1, 0x04, 0x00000010 },
     92	{ 0x419810,   1, 0x04, 0x00000000 },
     93	{ 0x419814,   1, 0x04, 0x00000004 },
     94	{ 0x419844,   1, 0x04, 0x00000000 },
     95	{ 0x41984c,   1, 0x04, 0x0000a918 },
     96	{ 0x419850,   4, 0x04, 0x00000000 },
     97	{ 0x419880,   1, 0x04, 0x00000002 },
     98	{}
     99};
    100
    101static const struct gf100_gr_init
    102gf119_gr_init_wwdx_0[] = {
    103	{ 0x419bd4,   1, 0x04, 0x00800000 },
    104	{ 0x419bdc,   1, 0x04, 0x00000000 },
    105	{ 0x419bf8,   2, 0x04, 0x00000000 },
    106	{}
    107};
    108
    109static const struct gf100_gr_init
    110gf119_gr_init_tpccs_1[] = {
    111	{ 0x419d2c,   1, 0x04, 0x00000000 },
    112	{ 0x419d48,   2, 0x04, 0x00000000 },
    113	{}
    114};
    115
    116const struct gf100_gr_init
    117gf119_gr_init_sm_0[] = {
    118	{ 0x419e00,   1, 0x04, 0x00000000 },
    119	{ 0x419ea0,   1, 0x04, 0x00000000 },
    120	{ 0x419ea4,   1, 0x04, 0x00000100 },
    121	{ 0x419ea8,   1, 0x04, 0x02001100 },
    122	{ 0x419eac,   1, 0x04, 0x11100702 },
    123	{ 0x419eb0,   1, 0x04, 0x00000003 },
    124	{ 0x419eb4,   4, 0x04, 0x00000000 },
    125	{ 0x419ec8,   1, 0x04, 0x0e063818 },
    126	{ 0x419ecc,   1, 0x04, 0x0e060e06 },
    127	{ 0x419ed0,   1, 0x04, 0x00003818 },
    128	{ 0x419ed4,   1, 0x04, 0x011104f1 },
    129	{ 0x419edc,   1, 0x04, 0x00000000 },
    130	{ 0x419f00,   1, 0x04, 0x00000000 },
    131	{ 0x419f2c,   1, 0x04, 0x00000000 },
    132	{}
    133};
    134
    135const struct gf100_gr_init
    136gf119_gr_init_fe_1[] = {
    137	{ 0x40402c,   1, 0x04, 0x00000000 },
    138	{ 0x4040f0,   1, 0x04, 0x00000000 },
    139	{ 0x404174,   1, 0x04, 0x00000000 },
    140	{}
    141};
    142
    143static const struct gf100_gr_pack
    144gf119_gr_pack_mmio[] = {
    145	{ gf100_gr_init_main_0 },
    146	{ gf100_gr_init_fe_0 },
    147	{ gf100_gr_init_pri_0 },
    148	{ gf100_gr_init_rstr2d_0 },
    149	{ gf119_gr_init_pd_0 },
    150	{ gf119_gr_init_ds_0 },
    151	{ gf100_gr_init_scc_0 },
    152	{ gf119_gr_init_prop_0 },
    153	{ gf108_gr_init_gpc_unk_0 },
    154	{ gf100_gr_init_setup_0 },
    155	{ gf100_gr_init_crstr_0 },
    156	{ gf108_gr_init_setup_1 },
    157	{ gf100_gr_init_zcull_0 },
    158	{ gf119_gr_init_gpm_0 },
    159	{ gf119_gr_init_gpc_unk_1 },
    160	{ gf100_gr_init_gcc_0 },
    161	{ gf100_gr_init_tpccs_0 },
    162	{ gf119_gr_init_tex_0 },
    163	{ gf119_gr_init_pe_0 },
    164	{ gf100_gr_init_l1c_0 },
    165	{ gf119_gr_init_wwdx_0 },
    166	{ gf119_gr_init_tpccs_1 },
    167	{ gf100_gr_init_mpc_0 },
    168	{ gf119_gr_init_sm_0 },
    169	{ gf100_gr_init_be_0 },
    170	{ gf119_gr_init_fe_1 },
    171	{}
    172};
    173
    174/*******************************************************************************
    175 * PGRAPH engine/subdev functions
    176 ******************************************************************************/
    177
    178static const struct gf100_gr_func
    179gf119_gr = {
    180	.oneinit_tiles = gf100_gr_oneinit_tiles,
    181	.oneinit_sm_id = gf100_gr_oneinit_sm_id,
    182	.init = gf100_gr_init,
    183	.init_gpc_mmu = gf100_gr_init_gpc_mmu,
    184	.init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
    185	.init_zcull = gf100_gr_init_zcull,
    186	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
    187	.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
    188	.init_40601c = gf100_gr_init_40601c,
    189	.init_419cc0 = gf100_gr_init_419cc0,
    190	.init_419eb4 = gf100_gr_init_419eb4,
    191	.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
    192	.init_shader_exceptions = gf100_gr_init_shader_exceptions,
    193	.init_400054 = gf100_gr_init_400054,
    194	.trap_mp = gf100_gr_trap_mp,
    195	.mmio = gf119_gr_pack_mmio,
    196	.fecs.ucode = &gf100_gr_fecs_ucode,
    197	.gpccs.ucode = &gf100_gr_gpccs_ucode,
    198	.rops = gf100_gr_rops,
    199	.grctx = &gf119_grctx,
    200	.zbc = &gf100_gr_zbc,
    201	.sclass = {
    202		{ -1, -1, FERMI_TWOD_A },
    203		{ -1, -1, FERMI_MEMORY_TO_MEMORY_FORMAT_A },
    204		{ -1, -1, FERMI_A, &gf100_fermi },
    205		{ -1, -1, FERMI_B, &gf100_fermi },
    206		{ -1, -1, FERMI_C, &gf100_fermi },
    207		{ -1, -1, FERMI_COMPUTE_A },
    208		{ -1, -1, FERMI_COMPUTE_B },
    209		{}
    210	}
    211};
    212
    213static const struct gf100_gr_fwif
    214gf119_gr_fwif[] = {
    215	{ -1, gf100_gr_load, &gf119_gr },
    216	{ -1, gf100_gr_nofw, &gf119_gr },
    217	{}
    218};
    219
    220int
    221gf119_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr)
    222{
    223	return gf100_gr_new_(gf119_gr_fwif, device, type, inst, pgr);
    224}