cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mcp89.c (1844B)


      1/*
      2 * Copyright 2012 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Ben Skeggs
     23 */
     24#include "nv50.h"
     25
     26#include <nvif/class.h>
     27
     28static const struct nvkm_gr_func
     29mcp89_gr = {
     30	.init = nv50_gr_init,
     31	.intr = nv50_gr_intr,
     32	.chan_new = nv50_gr_chan_new,
     33	.tlb_flush = g84_gr_tlb_flush,
     34	.units = nv50_gr_units,
     35	.sclass = {
     36		{ -1, -1, NV_NULL_CLASS, &nv50_gr_object },
     37		{ -1, -1, NV50_TWOD, &nv50_gr_object },
     38		{ -1, -1, NV50_MEMORY_TO_MEMORY_FORMAT, &nv50_gr_object },
     39		{ -1, -1, NV50_COMPUTE, &nv50_gr_object },
     40		{ -1, -1, GT214_COMPUTE, &nv50_gr_object },
     41		{ -1, -1, GT21A_TESLA, &nv50_gr_object },
     42		{}
     43	}
     44};
     45
     46int
     47mcp89_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr)
     48{
     49	return nv50_gr_new_(&mcp89_gr, device, type, inst, pgr);
     50}