cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nv40.c (2672B)

      1/*
      2 * Copyright 2012 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Ben Skeggs
     23 */
     24#include "nv31.h"
     25
     26#include <subdev/instmem.h>
     27
     28#include <nvif/class.h>
     29
     30bool
     31nv40_mpeg_mthd_dma(struct nvkm_device *device, u32 mthd, u32 data)
     32{
     33	struct nvkm_instmem *imem = device->imem;
     34	struct nv31_mpeg *mpeg = nv31_mpeg(device->mpeg);
     35	struct nvkm_subdev *subdev = &mpeg->engine.subdev;
     36	u32 inst = data << 4;
     37	u32 dma0 = nvkm_instmem_rd32(imem, inst + 0);
     38	u32 dma1 = nvkm_instmem_rd32(imem, inst + 4);
     39	u32 dma2 = nvkm_instmem_rd32(imem, inst + 8);
     40	u32 base = (dma2 & 0xfffff000) | (dma0 >> 20);
     41	u32 size = dma1 + 1;
     42
     43	/* only allow linear DMA objects */
     44	if (!(dma0 & 0x00002000)) {
     45		nvkm_error(subdev, "inst %08x dma0 %08x dma1 %08x dma2 %08x\n",
     46			   inst, dma0, dma1, dma2);
     47		return false;
     48	}
     49
     50	if (mthd == 0x0190) {
     51		/* DMA_CMD */
     52		nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000));
     53		nvkm_wr32(device, 0x00b334, base);
     54		nvkm_wr32(device, 0x00b324, size);
     55	} else
     56	if (mthd == 0x01a0) {
     57		/* DMA_DATA */
     58		nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2);
     59		nvkm_wr32(device, 0x00b360, base);
     60		nvkm_wr32(device, 0x00b364, size);
     61	} else {
     62		/* DMA_IMAGE, VRAM only */
     63		if (dma0 & 0x00030000)
     64			return false;
     65
     66		nvkm_wr32(device, 0x00b370, base);
     67		nvkm_wr32(device, 0x00b374, size);
     68	}
     69
     70	return true;
     71}
     72
     73static const struct nv31_mpeg_func
     74nv40_mpeg = {
     75	.mthd_dma = nv40_mpeg_mthd_dma,
     76};
     77
     78int
     79nv40_mpeg_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
     80	      struct nvkm_engine **pmpeg)
     81{
     82	return nv31_mpeg_new_(&nv40_mpeg, device, type, inst, pmpeg);
     83}