cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

nv50.c (4526B)

      1/*
      2 * Copyright 2012 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Ben Skeggs
     23 */
     24#include "nv50.h"
     25
     26#include <core/gpuobj.h>
     27#include <engine/disp.h>
     28#include <engine/fifo/chan.h>
     29#include <subdev/bar.h>
     30
     31#include <nvif/class.h>
     32#include <nvif/event.h>
     33
     34/*******************************************************************************
     35 * software context
     36 ******************************************************************************/
     37
     38static int
     39nv50_sw_chan_vblsem_release(struct nvkm_notify *notify)
     40{
     41	struct nv50_sw_chan *chan =
     42		container_of(notify, typeof(*chan), vblank.notify[notify->index]);
     43	struct nvkm_sw *sw = chan->base.sw;
     44	struct nvkm_device *device = sw->engine.subdev.device;
     45
     46	nvkm_wr32(device, 0x001704, chan->base.fifo->inst->addr >> 12);
     47	nvkm_wr32(device, 0x001710, 0x80000000 | chan->vblank.ctxdma);
     48	nvkm_bar_flush(device->bar);
     49
     50	if (device->chipset == 0x50) {
     51		nvkm_wr32(device, 0x001570, chan->vblank.offset);
     52		nvkm_wr32(device, 0x001574, chan->vblank.value);
     53	} else {
     54		nvkm_wr32(device, 0x060010, chan->vblank.offset);
     55		nvkm_wr32(device, 0x060014, chan->vblank.value);
     56	}
     57
     58	return NVKM_NOTIFY_DROP;
     59}
     60
     61static bool
     62nv50_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data)
     63{
     64	struct nv50_sw_chan *chan = nv50_sw_chan(base);
     65	struct nvkm_engine *engine = chan->base.object.engine;
     66	struct nvkm_device *device = engine->subdev.device;
     67	switch (mthd) {
     68	case 0x018c: chan->vblank.ctxdma = data; return true;
     69	case 0x0400: chan->vblank.offset = data; return true;
     70	case 0x0404: chan->vblank.value  = data; return true;
     71	case 0x0408:
     72		if (data < device->disp->vblank.index_nr) {
     73			nvkm_notify_get(&chan->vblank.notify[data]);
     74			return true;
     75		}
     76		break;
     77	default:
     78		break;
     79	}
     80	return false;
     81}
     82
     83void *
     84nv50_sw_chan_dtor(struct nvkm_sw_chan *base)
     85{
     86	struct nv50_sw_chan *chan = nv50_sw_chan(base);
     87	int i;
     88	for (i = 0; i < ARRAY_SIZE(chan->vblank.notify); i++)
     89		nvkm_notify_fini(&chan->vblank.notify[i]);
     90	return chan;
     91}
     92
     93static const struct nvkm_sw_chan_func
     94nv50_sw_chan = {
     95	.dtor = nv50_sw_chan_dtor,
     96	.mthd = nv50_sw_chan_mthd,
     97};
     98
     99static int
    100nv50_sw_chan_new(struct nvkm_sw *sw, struct nvkm_fifo_chan *fifoch,
    101		 const struct nvkm_oclass *oclass, struct nvkm_object **pobject)
    102{
    103	struct nvkm_disp *disp = sw->engine.subdev.device->disp;
    104	struct nv50_sw_chan *chan;
    105	int ret, i;
    106
    107	if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL)))
    108		return -ENOMEM;
    109	*pobject = &chan->base.object;
    110
    111	ret = nvkm_sw_chan_ctor(&nv50_sw_chan, sw, fifoch, oclass, &chan->base);
    112	if (ret)
    113		return ret;
    114
    115	for (i = 0; disp && i < disp->vblank.index_nr; i++) {
    116		ret = nvkm_notify_init(NULL, &disp->vblank,
    117				       nv50_sw_chan_vblsem_release, false,
    118				       &(struct nvif_notify_head_req_v0) {
    119					.head = i,
    120				       },
    121				       sizeof(struct nvif_notify_head_req_v0),
    122				       sizeof(struct nvif_notify_head_rep_v0),
    123				       &chan->vblank.notify[i]);
    124		if (ret)
    125			return ret;
    126	}
    127
    128	return 0;
    129}
    130
    131/*******************************************************************************
    132 * software engine/subdev functions
    133 ******************************************************************************/
    134
    135static const struct nvkm_sw_func
    136nv50_sw = {
    137	.chan_new = nv50_sw_chan_new,
    138	.sclass = {
    139		{ nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV50 } },
    140		{}
    141	}
    142};
    143
    144int
    145nv50_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw)
    146{
    147	return nvkm_sw_new_(&nv50_sw, device, type, inst, psw);
    148}