cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

tu102.c (2990B)

      1/*
      2 * Copyright 2018 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 */
     22#include "gf100.h"
     23
     24#include <core/memory.h>
     25#include <subdev/timer.h>
     26
     27static void
     28tu102_bar_bar2_wait(struct nvkm_bar *bar)
     29{
     30	struct nvkm_device *device = bar->subdev.device;
     31	nvkm_msec(device, 2000,
     32		if (!(nvkm_rd32(device, 0xb80f50) & 0x0000000c))
     33			break;
     34	);
     35}
     36
     37static void
     38tu102_bar_bar2_fini(struct nvkm_bar *bar)
     39{
     40	nvkm_mask(bar->subdev.device, 0xb80f48, 0x80000000, 0x00000000);
     41}
     42
     43static void
     44tu102_bar_bar2_init(struct nvkm_bar *base)
     45{
     46	struct nvkm_device *device = base->subdev.device;
     47	struct gf100_bar *bar = gf100_bar(base);
     48	u32 addr = nvkm_memory_addr(bar->bar[0].inst) >> 12;
     49	if (bar->bar2_halve)
     50		addr |= 0x40000000;
     51	nvkm_wr32(device, 0xb80f48, 0x80000000 | addr);
     52}
     53
     54static void
     55tu102_bar_bar1_wait(struct nvkm_bar *bar)
     56{
     57	struct nvkm_device *device = bar->subdev.device;
     58	nvkm_msec(device, 2000,
     59		if (!(nvkm_rd32(device, 0xb80f50) & 0x00000003))
     60			break;
     61	);
     62}
     63
     64static void
     65tu102_bar_bar1_fini(struct nvkm_bar *bar)
     66{
     67	nvkm_mask(bar->subdev.device, 0xb80f40, 0x80000000, 0x00000000);
     68}
     69
     70static void
     71tu102_bar_bar1_init(struct nvkm_bar *base)
     72{
     73	struct nvkm_device *device = base->subdev.device;
     74	struct gf100_bar *bar = gf100_bar(base);
     75	const u32 addr = nvkm_memory_addr(bar->bar[1].inst) >> 12;
     76	nvkm_wr32(device, 0xb80f40, 0x80000000 | addr);
     77}
     78
     79static const struct nvkm_bar_func
     80tu102_bar = {
     81	.dtor = gf100_bar_dtor,
     82	.oneinit = gf100_bar_oneinit,
     83	.bar1.init = tu102_bar_bar1_init,
     84	.bar1.fini = tu102_bar_bar1_fini,
     85	.bar1.wait = tu102_bar_bar1_wait,
     86	.bar1.vmm = gf100_bar_bar1_vmm,
     87	.bar2.init = tu102_bar_bar2_init,
     88	.bar2.fini = tu102_bar_bar2_fini,
     89	.bar2.wait = tu102_bar_bar2_wait,
     90	.bar2.vmm = gf100_bar_bar2_vmm,
     91	.flush = g84_bar_flush,
     92};
     93
     94int
     95tu102_bar_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
     96	      struct nvkm_bar **pbar)
     97{
     98	return gf100_bar_new_(&tu102_bar, device, type, inst, pbar);
     99}