cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

i2c.c (4773B)


      1/*
      2 * Copyright 2012 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Ben Skeggs
     23 */
     24#include <subdev/bios.h>
     25#include <subdev/bios/dcb.h>
     26#include <subdev/bios/i2c.h>
     27
     28u16
     29dcb_i2c_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
     30{
     31	u16 i2c = 0x0000;
     32	u16 dcb = dcb_table(bios, ver, hdr, cnt, len);
     33	if (dcb) {
     34		if (*ver >= 0x15)
     35			i2c = nvbios_rd16(bios, dcb + 2);
     36		if (*ver >= 0x30)
     37			i2c = nvbios_rd16(bios, dcb + 4);
     38	}
     39
     40	if (i2c && *ver >= 0x42) {
     41		nvkm_warn(&bios->subdev, "ccb %02x not supported\n", *ver);
     42		return 0x0000;
     43	}
     44
     45	if (i2c && *ver >= 0x30) {
     46		*ver = nvbios_rd08(bios, i2c + 0);
     47		*hdr = nvbios_rd08(bios, i2c + 1);
     48		*cnt = nvbios_rd08(bios, i2c + 2);
     49		*len = nvbios_rd08(bios, i2c + 3);
     50	} else {
     51		*ver = *ver; /* use DCB version */
     52		*hdr = 0;
     53		*cnt = 16;
     54		*len = 4;
     55	}
     56
     57	return i2c;
     58}
     59
     60u16
     61dcb_i2c_entry(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len)
     62{
     63	u8  hdr, cnt;
     64	u16 i2c = dcb_i2c_table(bios, ver, &hdr, &cnt, len);
     65	if (i2c && idx < cnt)
     66		return i2c + hdr + (idx * *len);
     67	return 0x0000;
     68}
     69
     70int
     71dcb_i2c_parse(struct nvkm_bios *bios, u8 idx, struct dcb_i2c_entry *info)
     72{
     73	struct nvkm_subdev *subdev = &bios->subdev;
     74	u8  ver, len;
     75	u16 ent = dcb_i2c_entry(bios, idx, &ver, &len);
     76	if (ent) {
     77		if (ver >= 0x41) {
     78			u32 ent_value = nvbios_rd32(bios, ent);
     79			u8 i2c_port = (ent_value >> 0) & 0x1f;
     80			u8 dpaux_port = (ent_value >> 5) & 0x1f;
     81			/* value 0x1f means unused according to DCB 4.x spec */
     82			if (i2c_port == 0x1f && dpaux_port == 0x1f)
     83				info->type = DCB_I2C_UNUSED;
     84			else
     85				info->type = DCB_I2C_PMGR;
     86		} else
     87		if (ver >= 0x30) {
     88			info->type = nvbios_rd08(bios, ent + 0x03);
     89		} else {
     90			info->type = nvbios_rd08(bios, ent + 0x03) & 0x07;
     91			if (info->type == 0x07)
     92				info->type = DCB_I2C_UNUSED;
     93		}
     94
     95		info->drive = DCB_I2C_UNUSED;
     96		info->sense = DCB_I2C_UNUSED;
     97		info->share = DCB_I2C_UNUSED;
     98		info->auxch = DCB_I2C_UNUSED;
     99
    100		switch (info->type) {
    101		case DCB_I2C_NV04_BIT:
    102			info->drive = nvbios_rd08(bios, ent + 0);
    103			info->sense = nvbios_rd08(bios, ent + 1);
    104			return 0;
    105		case DCB_I2C_NV4E_BIT:
    106			info->drive = nvbios_rd08(bios, ent + 1);
    107			return 0;
    108		case DCB_I2C_NVIO_BIT:
    109			info->drive = nvbios_rd08(bios, ent + 0) & 0x0f;
    110			if (nvbios_rd08(bios, ent + 1) & 0x01)
    111				info->share = nvbios_rd08(bios, ent + 1) >> 1;
    112			return 0;
    113		case DCB_I2C_NVIO_AUX:
    114			info->auxch = nvbios_rd08(bios, ent + 0) & 0x0f;
    115			if (nvbios_rd08(bios, ent + 1) & 0x01)
    116					info->share = info->auxch;
    117			return 0;
    118		case DCB_I2C_PMGR:
    119			info->drive = (nvbios_rd16(bios, ent + 0) & 0x01f) >> 0;
    120			if (info->drive == 0x1f)
    121				info->drive = DCB_I2C_UNUSED;
    122			info->auxch = (nvbios_rd16(bios, ent + 0) & 0x3e0) >> 5;
    123			if (info->auxch == 0x1f)
    124				info->auxch = DCB_I2C_UNUSED;
    125			info->share = info->auxch;
    126			return 0;
    127		case DCB_I2C_UNUSED:
    128			return 0;
    129		default:
    130			nvkm_warn(subdev, "unknown i2c type %d\n", info->type);
    131			info->type = DCB_I2C_UNUSED;
    132			return 0;
    133		}
    134	}
    135
    136	if (bios->bmp_offset && idx < 2) {
    137		/* BMP (from v4.0 has i2c info in the structure, it's in a
    138		 * fixed location on earlier VBIOS
    139		 */
    140		if (nvbios_rd08(bios, bios->bmp_offset + 5) < 4)
    141			ent = 0x0048;
    142		else
    143			ent = 0x0036 + bios->bmp_offset;
    144
    145		if (idx == 0) {
    146			info->drive = nvbios_rd08(bios, ent + 4);
    147			if (!info->drive) info->drive = 0x3f;
    148			info->sense = nvbios_rd08(bios, ent + 5);
    149			if (!info->sense) info->sense = 0x3e;
    150		} else
    151		if (idx == 1) {
    152			info->drive = nvbios_rd08(bios, ent + 6);
    153			if (!info->drive) info->drive = 0x37;
    154			info->sense = nvbios_rd08(bios, ent + 7);
    155			if (!info->sense) info->sense = 0x36;
    156		}
    157
    158		info->type  = DCB_I2C_NV04_BIT;
    159		info->share = DCB_I2C_UNUSED;
    160		return 0;
    161	}
    162
    163	return -ENOENT;
    164}