cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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g84.c (1816B)


      1/*
      2 * Copyright 2013 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Ben Skeggs <bskeggs@redhat.com>
     23 */
     24#include "nv50.h"
     25
     26static const struct nvkm_clk_func
     27g84_clk = {
     28	.read = nv50_clk_read,
     29	.calc = nv50_clk_calc,
     30	.prog = nv50_clk_prog,
     31	.tidy = nv50_clk_tidy,
     32	.domains = {
     33		{ nv_clk_src_crystal, 0xff },
     34		{ nv_clk_src_href   , 0xff },
     35		{ nv_clk_src_core   , 0xff, 0, "core", 1000 },
     36		{ nv_clk_src_shader , 0xff, 0, "shader", 1000 },
     37		{ nv_clk_src_mem    , 0xff, 0, "memory", 1000 },
     38		{ nv_clk_src_vdec   , 0xff },
     39		{ nv_clk_src_max }
     40	}
     41};
     42
     43int
     44g84_clk_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
     45	    struct nvkm_clk **pclk)
     46{
     47	return nv50_clk_new_(&g84_clk, device, type, inst, (device->chipset >= 0x94), pclk);
     48}