cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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gp10b.c (1871B)


      1/*
      2 * Copyright (c) 2019 NVIDIA Corporation.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 */
     22
     23#include "priv.h"
     24
     25#include <core/memory.h>
     26
     27#include <nvif/class.h>
     28
     29u64
     30gp10b_fault_buffer_pin(struct nvkm_fault_buffer *buffer)
     31{
     32	return nvkm_memory_addr(buffer->mem);
     33}
     34
     35static const struct nvkm_fault_func
     36gp10b_fault = {
     37	.intr = gp100_fault_intr,
     38	.buffer.nr = 1,
     39	.buffer.entry_size = 32,
     40	.buffer.info = gp100_fault_buffer_info,
     41	.buffer.pin = gp10b_fault_buffer_pin,
     42	.buffer.init = gp100_fault_buffer_init,
     43	.buffer.fini = gp100_fault_buffer_fini,
     44	.buffer.intr = gp100_fault_buffer_intr,
     45	.user = { { 0, 0, MAXWELL_FAULT_BUFFER_A }, 0 },
     46};
     47
     48int
     49gp10b_fault_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
     50		struct nvkm_fault **pfault)
     51{
     52	return nvkm_fault_new_(&gp10b_fault, device, type, inst, pfault);
     53}