cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ramseq.h (797B)

      1/* SPDX-License-Identifier: MIT */
      2#ifndef __NVKM_FBRAM_SEQ_H__
      3#define __NVKM_FBRAM_SEQ_H__
      4#include <subdev/bus/hwsq.h>
      5
      6#define ram_init(s,p)       hwsq_init(&(s)->base, (p))
      7#define ram_exec(s,e)       hwsq_exec(&(s)->base, (e))
      8#define ram_have(s,r)       ((s)->r_##r.addr != 0x000000)
      9#define ram_rd32(s,r)       hwsq_rd32(&(s)->base, &(s)->r_##r)
     10#define ram_wr32(s,r,d)     hwsq_wr32(&(s)->base, &(s)->r_##r, (d))
     11#define ram_nuke(s,r)       hwsq_nuke(&(s)->base, &(s)->r_##r)
     12#define ram_mask(s,r,m,d)   hwsq_mask(&(s)->base, &(s)->r_##r, (m), (d))
     13#define ram_setf(s,f,d)     hwsq_setf(&(s)->base, (f), (d))
     14#define ram_wait(s,f,d)     hwsq_wait(&(s)->base, (f), (d))
     15#define ram_wait_vblank(s)  hwsq_wait_vblank(&(s)->base)
     16#define ram_nsec(s,n)       hwsq_nsec(&(s)->base, (n))
     17#endif