cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

gf100.c (1987B)


      1/*
      2 * Copyright 2014 Martin Peres
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Martin Peres
     23 */
     24#include "priv.h"
     25
     26static u32
     27gf100_fuse_read(struct nvkm_fuse *fuse, u32 addr)
     28{
     29	struct nvkm_device *device = fuse->subdev.device;
     30	unsigned long flags;
     31	u32 fuse_enable, unk, val;
     32
     33	/* racy if another part of nvkm start writing to these regs */
     34	spin_lock_irqsave(&fuse->lock, flags);
     35	fuse_enable = nvkm_mask(device, 0x022400, 0x800, 0x800);
     36	unk = nvkm_mask(device, 0x021000, 0x1, 0x1);
     37	val = nvkm_rd32(device, 0x021100 + addr);
     38	nvkm_wr32(device, 0x021000, unk);
     39	nvkm_wr32(device, 0x022400, fuse_enable);
     40	spin_unlock_irqrestore(&fuse->lock, flags);
     41	return val;
     42}
     43
     44static const struct nvkm_fuse_func
     45gf100_fuse = {
     46	.read = gf100_fuse_read,
     47};
     48
     49int
     50gf100_fuse_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
     51	       struct nvkm_fuse **pfuse)
     52{
     53	return nvkm_fuse_new_(&gf100_fuse, device, type, inst, pfuse);
     54}