cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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g98.c (2293B)

      1/*
      2 * Copyright 2012 Red Hat Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Ben Skeggs
     23 */
     24#include "priv.h"
     25
     26static const struct nvkm_mc_map
     27g98_mc_reset[] = {
     28	{ 0x04008000, NVKM_ENGINE_MSVLD },
     29	{ 0x02004000, NVKM_ENGINE_SEC },
     30	{ 0x01020000, NVKM_ENGINE_MSPDEC },
     31	{ 0x00400002, NVKM_ENGINE_MSPPP },
     32	{ 0x00201000, NVKM_ENGINE_GR },
     33	{ 0x00000100, NVKM_ENGINE_FIFO },
     34	{}
     35};
     36
     37static const struct nvkm_mc_map
     38g98_mc_intr[] = {
     39	{ 0x04000000, NVKM_ENGINE_DISP },
     40	{ 0x00020000, NVKM_ENGINE_MSPDEC },
     41	{ 0x00008000, NVKM_ENGINE_MSVLD },
     42	{ 0x00004000, NVKM_ENGINE_SEC },
     43	{ 0x00001000, NVKM_ENGINE_GR },
     44	{ 0x00000100, NVKM_ENGINE_FIFO },
     45	{ 0x00000001, NVKM_ENGINE_MSPPP },
     46	{ 0x0002d101, NVKM_SUBDEV_FB },
     47	{ 0x10000000, NVKM_SUBDEV_BUS },
     48	{ 0x00200000, NVKM_SUBDEV_GPIO },
     49	{ 0x00200000, NVKM_SUBDEV_I2C },
     50	{ 0x00100000, NVKM_SUBDEV_TIMER },
     51	{},
     52};
     53
     54static const struct nvkm_mc_func
     55g98_mc = {
     56	.init = nv50_mc_init,
     57	.intr = g98_mc_intr,
     58	.intr_unarm = nv04_mc_intr_unarm,
     59	.intr_rearm = nv04_mc_intr_rearm,
     60	.intr_stat = nv04_mc_intr_stat,
     61	.reset = g98_mc_reset,
     62};
     63
     64int
     65g98_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
     66{
     67	return nvkm_mc_new_(&g98_mc, device, type, inst, pmc);
     68}