cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

gp10b.c (1839B)


      1/*
      2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 */
     23
     24#include "priv.h"
     25
     26static void
     27gp10b_mc_init(struct nvkm_mc *mc)
     28{
     29	struct nvkm_device *device = mc->subdev.device;
     30	nvkm_wr32(device, 0x000200, 0xffffffff); /* everything on */
     31	nvkm_wr32(device, 0x00020c, 0xffffffff); /* everything out of ELPG */
     32}
     33
     34static const struct nvkm_mc_func
     35gp10b_mc = {
     36	.init = gp10b_mc_init,
     37	.intr = gp100_mc_intr,
     38	.intr_unarm = gp100_mc_intr_unarm,
     39	.intr_rearm = gp100_mc_intr_rearm,
     40	.intr_mask = gp100_mc_intr_mask,
     41	.intr_stat = gf100_mc_intr_stat,
     42	.reset = gk104_mc_reset,
     43};
     44
     45int
     46gp10b_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
     47{
     48	return gp100_mc_new_(&gp10b_mc, device, type, inst, pmc);
     49}