cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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radeon_audio.h (4301B)

      1/*
      2 * Copyright 2014 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: Slava Grigorev <slava.grigorev@amd.com>
     23 */
     24
     25#ifndef __RADEON_AUDIO_H__
     26#define __RADEON_AUDIO_H__
     27
     28#include <linux/types.h>
     29
     30#define RREG32_ENDPOINT(block, reg)		\
     31	radeon_audio_endpoint_rreg(rdev, (block), (reg))
     32#define WREG32_ENDPOINT(block, reg, v)	\
     33	radeon_audio_endpoint_wreg(rdev, (block), (reg), (v))
     34
     35struct radeon_audio_basic_funcs
     36{
     37	u32  (*endpoint_rreg)(struct radeon_device *rdev, u32 offset, u32 reg);
     38	void (*endpoint_wreg)(struct radeon_device *rdev,
     39		u32 offset, u32 reg, u32 v);
     40	void (*enable)(struct radeon_device *rdev,
     41		struct r600_audio_pin *pin, u8 enable_mask);
     42};
     43
     44struct radeon_audio_funcs
     45{
     46	void (*select_pin)(struct drm_encoder *encoder);
     47	struct r600_audio_pin* (*get_pin)(struct radeon_device *rdev);
     48	void (*write_latency_fields)(struct drm_encoder *encoder,
     49		struct drm_connector *connector, struct drm_display_mode *mode);
     50	void (*write_sad_regs)(struct drm_encoder *encoder,
     51		struct cea_sad *sads, int sad_count);
     52	void (*write_speaker_allocation)(struct drm_encoder *encoder,
     53		u8 *sadb, int sad_count);
     54	void (*set_dto)(struct radeon_device *rdev,
     55		struct radeon_crtc *crtc, unsigned int clock);
     56	void (*update_acr)(struct drm_encoder *encoder, long offset,
     57		const struct radeon_hdmi_acr *acr);
     58	void (*set_vbi_packet)(struct drm_encoder *encoder, u32 offset);
     59	void (*set_color_depth)(struct drm_encoder *encoder, u32 offset, int bpc);
     60	void (*set_avi_packet)(struct radeon_device *rdev, u32 offset,
     61		unsigned char *buffer, size_t size);
     62	void (*set_audio_packet)(struct drm_encoder *encoder, u32 offset);
     63	void (*set_mute)(struct drm_encoder *encoder, u32 offset, bool mute);
     64	void (*mode_set)(struct drm_encoder *encoder,
     65		struct drm_display_mode *mode);
     66	void (*dpms)(struct drm_encoder *encoder, bool mode);
     67};
     68
     69int radeon_audio_init(struct radeon_device *rdev);
     70void radeon_audio_detect(struct drm_connector *connector,
     71			 struct drm_encoder *encoder,
     72			 enum drm_connector_status status);
     73u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev,
     74	u32 offset, u32 reg);
     75void radeon_audio_endpoint_wreg(struct radeon_device *rdev,
     76	u32 offset,	u32 reg, u32 v);
     77struct r600_audio_pin *radeon_audio_get_pin(struct drm_encoder *encoder);
     78void radeon_audio_fini(struct radeon_device *rdev);
     79void radeon_audio_mode_set(struct drm_encoder *encoder,
     80	struct drm_display_mode *mode);
     81void radeon_audio_dpms(struct drm_encoder *encoder, int mode);
     82unsigned int radeon_audio_decode_dfs_div(unsigned int div);
     83
     84void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
     85				struct cea_sad *sads, int sad_count);
     86void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
     87					       u8 *sadb, int sad_count);
     88void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
     89					     u8 *sadb, int sad_count);
     90void dce3_2_audio_set_dto(struct radeon_device *rdev,
     91			  struct radeon_crtc *crtc, unsigned int clock);
     92void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
     93			    const struct radeon_hdmi_acr *acr);
     94void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset);
     95void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
     96#endif