cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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radeon_family.h (2845B)

      1/*
      2 * Copyright 2008 Advanced Micro Devices, Inc.
      3 * Copyright 2008 Red Hat Inc.
      4 * Copyright 2009 Jerome Glisse.
      5 *
      6 * Permission is hereby granted, free of charge, to any person obtaining a
      7 * copy of this software and associated documentation files (the "Software"),
      8 * to deal in the Software without restriction, including without limitation
      9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10 * and/or sell copies of the Software, and to permit persons to whom the
     11 * Software is furnished to do so, subject to the following conditions:
     12 *
     13 * The above copyright notice and this permission notice shall be included in
     14 * all copies or substantial portions of the Software.
     15 *
     16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22 * OTHER DEALINGS IN THE SOFTWARE.
     23 *
     24 * Authors: Dave Airlie
     25 *          Alex Deucher
     26 *          Jerome Glisse
     27 */
     28
     29/* this file defines the CHIP_  and family flags used in the pciids,
     30 * its is common between kms and non-kms because duplicating it and
     31 * changing one place is fail.
     32 */
     33#ifndef RADEON_FAMILY_H
     34#define RADEON_FAMILY_H
     35/*
     36 * Radeon chip families
     37 */
     38enum radeon_family {
     39	CHIP_R100 = 0,
     40	CHIP_RV100,
     41	CHIP_RS100,
     42	CHIP_RV200,
     43	CHIP_RS200,
     44	CHIP_R200,
     45	CHIP_RV250,
     46	CHIP_RS300,
     47	CHIP_RV280,
     48	CHIP_R300,
     49	CHIP_R350,
     50	CHIP_RV350,
     51	CHIP_RV380,
     52	CHIP_R420,
     53	CHIP_R423,
     54	CHIP_RV410,
     55	CHIP_RS400,
     56	CHIP_RS480,
     57	CHIP_RS600,
     58	CHIP_RS690,
     59	CHIP_RS740,
     60	CHIP_RV515,
     61	CHIP_R520,
     62	CHIP_RV530,
     63	CHIP_RV560,
     64	CHIP_RV570,
     65	CHIP_R580,
     66	CHIP_R600,
     67	CHIP_RV610,
     68	CHIP_RV630,
     69	CHIP_RV670,
     70	CHIP_RV620,
     71	CHIP_RV635,
     72	CHIP_RS780,
     73	CHIP_RS880,
     74	CHIP_RV770,
     75	CHIP_RV730,
     76	CHIP_RV710,
     77	CHIP_RV740,
     78	CHIP_CEDAR,
     79	CHIP_REDWOOD,
     80	CHIP_JUNIPER,
     81	CHIP_CYPRESS,
     82	CHIP_HEMLOCK,
     83	CHIP_PALM,
     84	CHIP_SUMO,
     85	CHIP_SUMO2,
     86	CHIP_BARTS,
     87	CHIP_TURKS,
     88	CHIP_CAICOS,
     89	CHIP_CAYMAN,
     90	CHIP_ARUBA,
     91	CHIP_TAHITI,
     92	CHIP_PITCAIRN,
     93	CHIP_VERDE,
     94	CHIP_OLAND,
     95	CHIP_HAINAN,
     96	CHIP_BONAIRE,
     97	CHIP_KAVERI,
     98	CHIP_KABINI,
     99	CHIP_HAWAII,
    100	CHIP_MULLINS,
    101	CHIP_LAST,
    102};
    103
    104/*
    105 * Chip flags
    106 */
    107enum radeon_chip_flags {
    108	RADEON_FAMILY_MASK = 0x0000ffffUL,
    109	RADEON_FLAGS_MASK = 0xffff0000UL,
    110	RADEON_IS_MOBILITY = 0x00010000UL,
    111	RADEON_IS_IGP = 0x00020000UL,
    112	RADEON_SINGLE_CRTC = 0x00040000UL,
    113	RADEON_IS_AGP = 0x00080000UL,
    114	RADEON_HAS_HIERZ = 0x00100000UL,
    115	RADEON_IS_PCIE = 0x00200000UL,
    116	RADEON_NEW_MEMMAP = 0x00400000UL,
    117	RADEON_IS_PCI = 0x00800000UL,
    118	RADEON_IS_IGPGART = 0x01000000UL,
    119	RADEON_IS_PX = 0x02000000UL,
    120};
    121
    122#endif