cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun8i_vi_layer.h (2421B)

      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net>
      4 */
      5
      6#ifndef _SUN8I_VI_LAYER_H_
      7#define _SUN8I_VI_LAYER_H_
      8
      9#include <drm/drm_plane.h>
     10
     11#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, layer) \
     12		((base) + 0x30 * (layer) + 0x0)
     13#define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(base, layer) \
     14		((base) + 0x30 * (layer) + 0x4)
     15#define SUN8I_MIXER_CHAN_VI_LAYER_COORD(base, layer) \
     16		((base) + 0x30 * (layer) + 0x8)
     17#define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \
     18		((base) + 0x30 * (layer) + 0xc + 4 * (plane))
     19#define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \
     20		((base) + 0x30 * (layer) + 0x18 + 4 * (plane))
     21#define SUN8I_MIXER_CHAN_VI_OVL_SIZE(base) \
     22		((base) + 0xe8)
     23#define SUN8I_MIXER_CHAN_VI_HDS_Y(base) \
     24		((base) + 0xf0)
     25#define SUN8I_MIXER_CHAN_VI_HDS_UV(base) \
     26		((base) + 0xf4)
     27#define SUN8I_MIXER_CHAN_VI_VDS_Y(base) \
     28		((base) + 0xf8)
     29#define SUN8I_MIXER_CHAN_VI_VDS_UV(base) \
     30		((base) + 0xfc)
     31
     32#define SUN8I_MIXER_FCC_GLOBAL_ALPHA_REG \
     33		(0xAA000 + 0x90)
     34
     35#define SUN8I_MIXER_FCC_GLOBAL_ALPHA(x)			((x) << 24)
     36#define SUN8I_MIXER_FCC_GLOBAL_ALPHA_MASK		GENMASK(31, 24)
     37
     38#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN		BIT(0)
     39/* RGB mode should be set for RGB formats and cleared for YCbCr */
     40#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE		BIT(15)
     41#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET	8
     42#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK	GENMASK(12, 8)
     43#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_MASK	GENMASK(2, 1)
     44#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK	GENMASK(31, 24)
     45#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(x)	((x) << 24)
     46
     47#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_PIXEL	((0) << 1)
     48#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_LAYER	((1) << 1)
     49#define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_COMBINED	((2) << 1)
     50
     51#define SUN8I_MIXER_CHAN_VI_DS_N(x)			((x) << 16)
     52#define SUN8I_MIXER_CHAN_VI_DS_M(x)			((x) << 0)
     53
     54struct sun8i_mixer;
     55
     56struct sun8i_vi_layer {
     57	struct drm_plane	plane;
     58	struct sun8i_mixer	*mixer;
     59	int			channel;
     60	int			overlay;
     61};
     62
     63static inline struct sun8i_vi_layer *
     64plane_to_sun8i_vi_layer(struct drm_plane *plane)
     65{
     66	return container_of(plane, struct sun8i_vi_layer, plane);
     67}
     68
     69struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
     70					       struct sun8i_mixer *mixer,
     71					       int index);
     72#endif /* _SUN8I_VI_LAYER_H_ */