cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tidss_plane.c (6693B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
      4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
      5 */
      6
      7#include <drm/drm_atomic.h>
      8#include <drm/drm_atomic_helper.h>
      9#include <drm/drm_crtc.h>
     10#include <drm/drm_crtc_helper.h>
     11#include <drm/drm_fourcc.h>
     12#include <drm/drm_fb_cma_helper.h>
     13#include <drm/drm_gem_atomic_helper.h>
     14
     15#include "tidss_crtc.h"
     16#include "tidss_dispc.h"
     17#include "tidss_drv.h"
     18#include "tidss_plane.h"
     19
     20/* drm_plane_helper_funcs */
     21
     22static int tidss_plane_atomic_check(struct drm_plane *plane,
     23				    struct drm_atomic_state *state)
     24{
     25	struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
     26										 plane);
     27	struct drm_device *ddev = plane->dev;
     28	struct tidss_device *tidss = to_tidss(ddev);
     29	struct tidss_plane *tplane = to_tidss_plane(plane);
     30	const struct drm_format_info *finfo;
     31	struct drm_crtc_state *crtc_state;
     32	u32 hw_plane = tplane->hw_plane_id;
     33	u32 hw_videoport;
     34	int ret;
     35
     36	dev_dbg(ddev->dev, "%s\n", __func__);
     37
     38	if (!new_plane_state->crtc) {
     39		/*
     40		 * The visible field is not reset by the DRM core but only
     41		 * updated by drm_plane_helper_check_state(), set it manually.
     42		 */
     43		new_plane_state->visible = false;
     44		return 0;
     45	}
     46
     47	crtc_state = drm_atomic_get_crtc_state(state,
     48					       new_plane_state->crtc);
     49	if (IS_ERR(crtc_state))
     50		return PTR_ERR(crtc_state);
     51
     52	ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
     53						  0,
     54						  INT_MAX, true, true);
     55	if (ret < 0)
     56		return ret;
     57
     58	/*
     59	 * The HW is only able to start drawing at subpixel boundary
     60	 * (the two first checks bellow). At the end of a row the HW
     61	 * can only jump integer number of subpixels forward to the
     62	 * beginning of the next row. So we can only show picture with
     63	 * integer subpixel width (the third check). However, after
     64	 * reaching the end of the drawn picture the drawing starts
     65	 * again at the absolute memory address where top left corner
     66	 * position of the drawn picture is (so there is no need to
     67	 * check for odd height).
     68	 */
     69
     70	finfo = drm_format_info(new_plane_state->fb->format->format);
     71
     72	if ((new_plane_state->src_x >> 16) % finfo->hsub != 0) {
     73		dev_dbg(ddev->dev,
     74			"%s: x-position %u not divisible subpixel size %u\n",
     75			__func__, (new_plane_state->src_x >> 16), finfo->hsub);
     76		return -EINVAL;
     77	}
     78
     79	if ((new_plane_state->src_y >> 16) % finfo->vsub != 0) {
     80		dev_dbg(ddev->dev,
     81			"%s: y-position %u not divisible subpixel size %u\n",
     82			__func__, (new_plane_state->src_y >> 16), finfo->vsub);
     83		return -EINVAL;
     84	}
     85
     86	if ((new_plane_state->src_w >> 16) % finfo->hsub != 0) {
     87		dev_dbg(ddev->dev,
     88			"%s: src width %u not divisible by subpixel size %u\n",
     89			 __func__, (new_plane_state->src_w >> 16),
     90			 finfo->hsub);
     91		return -EINVAL;
     92	}
     93
     94	if (!new_plane_state->visible)
     95		return 0;
     96
     97	hw_videoport = to_tidss_crtc(new_plane_state->crtc)->hw_videoport;
     98
     99	ret = dispc_plane_check(tidss->dispc, hw_plane, new_plane_state,
    100				hw_videoport);
    101	if (ret)
    102		return ret;
    103
    104	return 0;
    105}
    106
    107static void tidss_plane_atomic_update(struct drm_plane *plane,
    108				      struct drm_atomic_state *state)
    109{
    110	struct drm_device *ddev = plane->dev;
    111	struct tidss_device *tidss = to_tidss(ddev);
    112	struct tidss_plane *tplane = to_tidss_plane(plane);
    113	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
    114									   plane);
    115	u32 hw_videoport;
    116	int ret;
    117
    118	dev_dbg(ddev->dev, "%s\n", __func__);
    119
    120	if (!new_state->visible) {
    121		dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
    122		return;
    123	}
    124
    125	hw_videoport = to_tidss_crtc(new_state->crtc)->hw_videoport;
    126
    127	ret = dispc_plane_setup(tidss->dispc, tplane->hw_plane_id,
    128				new_state, hw_videoport);
    129
    130	if (ret) {
    131		dev_err(plane->dev->dev, "%s: Failed to setup plane %d\n",
    132			__func__, tplane->hw_plane_id);
    133		dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
    134		return;
    135	}
    136
    137	dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, true);
    138}
    139
    140static void tidss_plane_atomic_disable(struct drm_plane *plane,
    141				       struct drm_atomic_state *state)
    142{
    143	struct drm_device *ddev = plane->dev;
    144	struct tidss_device *tidss = to_tidss(ddev);
    145	struct tidss_plane *tplane = to_tidss_plane(plane);
    146
    147	dev_dbg(ddev->dev, "%s\n", __func__);
    148
    149	dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
    150}
    151
    152static void drm_plane_destroy(struct drm_plane *plane)
    153{
    154	struct tidss_plane *tplane = to_tidss_plane(plane);
    155
    156	drm_plane_cleanup(plane);
    157	kfree(tplane);
    158}
    159
    160static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = {
    161	.atomic_check = tidss_plane_atomic_check,
    162	.atomic_update = tidss_plane_atomic_update,
    163	.atomic_disable = tidss_plane_atomic_disable,
    164};
    165
    166static const struct drm_plane_funcs tidss_plane_funcs = {
    167	.update_plane = drm_atomic_helper_update_plane,
    168	.disable_plane = drm_atomic_helper_disable_plane,
    169	.reset = drm_atomic_helper_plane_reset,
    170	.destroy = drm_plane_destroy,
    171	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
    172	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
    173};
    174
    175struct tidss_plane *tidss_plane_create(struct tidss_device *tidss,
    176				       u32 hw_plane_id, u32 plane_type,
    177				       u32 crtc_mask, const u32 *formats,
    178				       u32 num_formats)
    179{
    180	struct tidss_plane *tplane;
    181	enum drm_plane_type type;
    182	u32 possible_crtcs;
    183	u32 num_planes = tidss->feat->num_planes;
    184	u32 color_encodings = (BIT(DRM_COLOR_YCBCR_BT601) |
    185			       BIT(DRM_COLOR_YCBCR_BT709));
    186	u32 color_ranges = (BIT(DRM_COLOR_YCBCR_FULL_RANGE) |
    187			    BIT(DRM_COLOR_YCBCR_LIMITED_RANGE));
    188	u32 default_encoding = DRM_COLOR_YCBCR_BT601;
    189	u32 default_range = DRM_COLOR_YCBCR_FULL_RANGE;
    190	u32 blend_modes = (BIT(DRM_MODE_BLEND_PREMULTI) |
    191			   BIT(DRM_MODE_BLEND_COVERAGE));
    192	int ret;
    193
    194	tplane = kzalloc(sizeof(*tplane), GFP_KERNEL);
    195	if (!tplane)
    196		return ERR_PTR(-ENOMEM);
    197
    198	tplane->hw_plane_id = hw_plane_id;
    199
    200	possible_crtcs = crtc_mask;
    201	type = plane_type;
    202
    203	ret = drm_universal_plane_init(&tidss->ddev, &tplane->plane,
    204				       possible_crtcs,
    205				       &tidss_plane_funcs,
    206				       formats, num_formats,
    207				       NULL, type, NULL);
    208	if (ret < 0)
    209		goto err;
    210
    211	drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs);
    212
    213	drm_plane_create_zpos_property(&tplane->plane, hw_plane_id, 0,
    214				       num_planes - 1);
    215
    216	ret = drm_plane_create_color_properties(&tplane->plane,
    217						color_encodings,
    218						color_ranges,
    219						default_encoding,
    220						default_range);
    221	if (ret)
    222		goto err;
    223
    224	ret = drm_plane_create_alpha_property(&tplane->plane);
    225	if (ret)
    226		goto err;
    227
    228	ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes);
    229	if (ret)
    230		goto err;
    231
    232	return tplane;
    233
    234err:
    235	kfree(tplane);
    236	return ERR_PTR(ret);
    237}