cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ttm_module.c (3181B)

      1/* SPDX-License-Identifier: GPL-2.0 OR MIT */
      2/**************************************************************************
      3 *
      4 * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
      5 * All Rights Reserved.
      6 *
      7 * Permission is hereby granted, free of charge, to any person obtaining a
      8 * copy of this software and associated documentation files (the
      9 * "Software"), to deal in the Software without restriction, including
     10 * without limitation the rights to use, copy, modify, merge, publish,
     11 * distribute, sub license, and/or sell copies of the Software, and to
     12 * permit persons to whom the Software is furnished to do so, subject to
     13 * the following conditions:
     14 *
     15 * The above copyright notice and this permission notice (including the
     16 * next paragraph) shall be included in all copies or substantial portions
     17 * of the Software.
     18 *
     19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
     22 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
     23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
     24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
     25 * USE OR OTHER DEALINGS IN THE SOFTWARE.
     26 *
     27 **************************************************************************/
     28/*
     29 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
     30 * 	    Jerome Glisse
     31 */
     32#include <linux/module.h>
     33#include <linux/device.h>
     34#include <linux/pgtable.h>
     35#include <linux/sched.h>
     36#include <linux/debugfs.h>
     37#include <drm/drm_sysfs.h>
     38#include <drm/ttm/ttm_caching.h>
     39
     40#include "ttm_module.h"
     41
     42/**
     43 * DOC: TTM
     44 *
     45 * TTM is a memory manager for accelerator devices with dedicated memory.
     46 *
     47 * The basic idea is that resources are grouped together in buffer objects of
     48 * certain size and TTM handles lifetime, movement and CPU mappings of those
     49 * objects.
     50 *
     51 * TODO: Add more design background and information here.
     52 */
     53
     54/**
     55 * ttm_prot_from_caching - Modify the page protection according to the
     56 * ttm cacing mode
     57 * @caching: The ttm caching mode
     58 * @tmp: The original page protection
     59 *
     60 * Return: The modified page protection
     61 */
     62pgprot_t ttm_prot_from_caching(enum ttm_caching caching, pgprot_t tmp)
     63{
     64	/* Cached mappings need no adjustment */
     65	if (caching == ttm_cached)
     66		return tmp;
     67
     68#if defined(__i386__) || defined(__x86_64__)
     69	if (caching == ttm_write_combined)
     70		tmp = pgprot_writecombine(tmp);
     71#ifndef CONFIG_UML
     72	else if (boot_cpu_data.x86 > 3)
     73		tmp = pgprot_noncached(tmp);
     74#endif /* CONFIG_UML */
     75#endif /* __i386__ || __x86_64__ */
     76#if defined(__ia64__) || defined(__arm__) || defined(__aarch64__) || \
     77	defined(__powerpc__) || defined(__mips__) || defined(__loongarch__)
     78	if (caching == ttm_write_combined)
     79		tmp = pgprot_writecombine(tmp);
     80	else
     81		tmp = pgprot_noncached(tmp);
     82#endif
     83#if defined(__sparc__)
     84	tmp = pgprot_noncached(tmp);
     85#endif
     86	return tmp;
     87}
     88
     89MODULE_AUTHOR("Thomas Hellstrom, Jerome Glisse");
     90MODULE_DESCRIPTION("TTM memory manager subsystem (for DRM device)");
     91MODULE_LICENSE("GPL and additional rights");