cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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zynqmp_dpsub.h (1134B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * ZynqMP DPSUB Subsystem Driver
      4 *
      5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
      6 *
      7 * Authors:
      8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
      9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
     10 */
     11
     12#ifndef _ZYNQMP_DPSUB_H_
     13#define _ZYNQMP_DPSUB_H_
     14
     15struct clk;
     16struct device;
     17struct drm_device;
     18struct zynqmp_disp;
     19struct zynqmp_dp;
     20
     21enum zynqmp_dpsub_format {
     22	ZYNQMP_DPSUB_FORMAT_RGB,
     23	ZYNQMP_DPSUB_FORMAT_YCRCB444,
     24	ZYNQMP_DPSUB_FORMAT_YCRCB422,
     25	ZYNQMP_DPSUB_FORMAT_YONLY,
     26};
     27
     28/**
     29 * struct zynqmp_dpsub - ZynqMP DisplayPort Subsystem
     30 * @drm: The DRM/KMS device
     31 * @dev: The physical device
     32 * @apb_clk: The APB clock
     33 * @disp: The display controller
     34 * @dp: The DisplayPort controller
     35 * @dma_align: DMA alignment constraint (must be a power of 2)
     36 */
     37struct zynqmp_dpsub {
     38	struct drm_device drm;
     39	struct device *dev;
     40
     41	struct clk *apb_clk;
     42
     43	struct zynqmp_disp *disp;
     44	struct zynqmp_dp *dp;
     45
     46	unsigned int dma_align;
     47};
     48
     49static inline struct zynqmp_dpsub *to_zynqmp_dpsub(struct drm_device *drm)
     50{
     51	return container_of(drm, struct zynqmp_dpsub, drm);
     52}
     53
     54#endif /* _ZYNQMP_DPSUB_H_ */