cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cdma.h (3220B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Tegra host1x Command DMA
      4 *
      5 * Copyright (c) 2010-2013, NVIDIA Corporation.
      6 */
      7
      8#ifndef __HOST1X_CDMA_H
      9#define __HOST1X_CDMA_H
     10
     11#include <linux/sched.h>
     12#include <linux/completion.h>
     13#include <linux/list.h>
     14
     15struct host1x_syncpt;
     16struct host1x_userctx_timeout;
     17struct host1x_job;
     18
     19/*
     20 * cdma
     21 *
     22 * This is in charge of a host command DMA channel.
     23 * Sends ops to a push buffer, and takes responsibility for unpinning
     24 * (& possibly freeing) of memory after those ops have completed.
     25 * Producer:
     26 *	begin
     27 *		push - send ops to the push buffer
     28 *	end - start command DMA and enqueue handles to be unpinned
     29 * Consumer:
     30 *	update - call to update sync queue and push buffer, unpin memory
     31 */
     32
     33struct push_buffer {
     34	void *mapped;			/* mapped pushbuffer memory */
     35	dma_addr_t dma;			/* device address of pushbuffer */
     36	dma_addr_t phys;		/* physical address of pushbuffer */
     37	u32 fence;			/* index we've written */
     38	u32 pos;			/* index to write to */
     39	u32 size;
     40	u32 alloc_size;
     41};
     42
     43struct buffer_timeout {
     44	struct delayed_work wq;		/* work queue */
     45	bool initialized;		/* timer one-time setup flag */
     46	struct host1x_syncpt *syncpt;	/* buffer completion syncpt */
     47	u32 syncpt_val;			/* syncpt value when completed */
     48	ktime_t start_ktime;		/* starting time */
     49	/* context timeout information */
     50	struct host1x_client *client;
     51};
     52
     53enum cdma_event {
     54	CDMA_EVENT_NONE,		/* not waiting for any event */
     55	CDMA_EVENT_SYNC_QUEUE_EMPTY,	/* wait for empty sync queue */
     56	CDMA_EVENT_PUSH_BUFFER_SPACE	/* wait for space in push buffer */
     57};
     58
     59struct host1x_cdma {
     60	struct mutex lock;		/* controls access to shared state */
     61	struct completion complete;	/* signalled when event occurs */
     62	enum cdma_event event;		/* event that complete is waiting for */
     63	unsigned int slots_used;	/* pb slots used in current submit */
     64	unsigned int slots_free;	/* pb slots free in current submit */
     65	unsigned int first_get;		/* DMAGET value, where submit begins */
     66	unsigned int last_pos;		/* last value written to DMAPUT */
     67	struct push_buffer push_buffer;	/* channel's push buffer */
     68	struct list_head sync_queue;	/* job queue */
     69	struct buffer_timeout timeout;	/* channel's timeout state/wq */
     70	bool running;
     71	bool torndown;
     72};
     73
     74#define cdma_to_channel(cdma) container_of(cdma, struct host1x_channel, cdma)
     75#define cdma_to_host1x(cdma) dev_get_drvdata(cdma_to_channel(cdma)->dev->parent)
     76#define pb_to_cdma(pb) container_of(pb, struct host1x_cdma, push_buffer)
     77
     78int host1x_cdma_init(struct host1x_cdma *cdma);
     79int host1x_cdma_deinit(struct host1x_cdma *cdma);
     80int host1x_cdma_begin(struct host1x_cdma *cdma, struct host1x_job *job);
     81void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2);
     82void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2,
     83			   u32 op3, u32 op4);
     84void host1x_cdma_end(struct host1x_cdma *cdma, struct host1x_job *job);
     85void host1x_cdma_update(struct host1x_cdma *cdma);
     86void host1x_cdma_peek(struct host1x_cdma *cdma, u32 dmaget, int slot,
     87		      u32 *out);
     88unsigned int host1x_cdma_wait_locked(struct host1x_cdma *cdma,
     89				     enum cdma_event event);
     90void host1x_cdma_update_sync_queue(struct host1x_cdma *cdma,
     91				   struct device *dev);
     92#endif