cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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host1x05_hardware.h (3419B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Tegra host1x Register Offsets for Tegra210
      4 *
      5 * Copyright (c) 2015 NVIDIA Corporation.
      6 */
      7
      8#ifndef __HOST1X_HOST1X05_HARDWARE_H
      9#define __HOST1X_HOST1X05_HARDWARE_H
     10
     11#include <linux/types.h>
     12#include <linux/bitops.h>
     13
     14#include "hw_host1x05_channel.h"
     15#include "hw_host1x05_sync.h"
     16#include "hw_host1x05_uclass.h"
     17
     18static inline u32 host1x_class_host_wait_syncpt(
     19	unsigned indx, unsigned threshold)
     20{
     21	return host1x_uclass_wait_syncpt_indx_f(indx)
     22		| host1x_uclass_wait_syncpt_thresh_f(threshold);
     23}
     24
     25static inline u32 host1x_class_host_load_syncpt_base(
     26	unsigned indx, unsigned threshold)
     27{
     28	return host1x_uclass_load_syncpt_base_base_indx_f(indx)
     29		| host1x_uclass_load_syncpt_base_value_f(threshold);
     30}
     31
     32static inline u32 host1x_class_host_wait_syncpt_base(
     33	unsigned indx, unsigned base_indx, unsigned offset)
     34{
     35	return host1x_uclass_wait_syncpt_base_indx_f(indx)
     36		| host1x_uclass_wait_syncpt_base_base_indx_f(base_indx)
     37		| host1x_uclass_wait_syncpt_base_offset_f(offset);
     38}
     39
     40static inline u32 host1x_class_host_incr_syncpt_base(
     41	unsigned base_indx, unsigned offset)
     42{
     43	return host1x_uclass_incr_syncpt_base_base_indx_f(base_indx)
     44		| host1x_uclass_incr_syncpt_base_offset_f(offset);
     45}
     46
     47static inline u32 host1x_class_host_incr_syncpt(
     48	unsigned cond, unsigned indx)
     49{
     50	return host1x_uclass_incr_syncpt_cond_f(cond)
     51		| host1x_uclass_incr_syncpt_indx_f(indx);
     52}
     53
     54static inline u32 host1x_class_host_indoff_reg_write(
     55	unsigned mod_id, unsigned offset, bool auto_inc)
     56{
     57	u32 v = host1x_uclass_indoff_indbe_f(0xf)
     58		| host1x_uclass_indoff_indmodid_f(mod_id)
     59		| host1x_uclass_indoff_indroffset_f(offset);
     60	if (auto_inc)
     61		v |= host1x_uclass_indoff_autoinc_f(1);
     62	return v;
     63}
     64
     65static inline u32 host1x_class_host_indoff_reg_read(
     66	unsigned mod_id, unsigned offset, bool auto_inc)
     67{
     68	u32 v = host1x_uclass_indoff_indmodid_f(mod_id)
     69		| host1x_uclass_indoff_indroffset_f(offset)
     70		| host1x_uclass_indoff_rwn_read_v();
     71	if (auto_inc)
     72		v |= host1x_uclass_indoff_autoinc_f(1);
     73	return v;
     74}
     75
     76/* cdma opcodes */
     77static inline u32 host1x_opcode_setclass(
     78	unsigned class_id, unsigned offset, unsigned mask)
     79{
     80	return (0 << 28) | (offset << 16) | (class_id << 6) | mask;
     81}
     82
     83static inline u32 host1x_opcode_incr(unsigned offset, unsigned count)
     84{
     85	return (1 << 28) | (offset << 16) | count;
     86}
     87
     88static inline u32 host1x_opcode_nonincr(unsigned offset, unsigned count)
     89{
     90	return (2 << 28) | (offset << 16) | count;
     91}
     92
     93static inline u32 host1x_opcode_mask(unsigned offset, unsigned mask)
     94{
     95	return (3 << 28) | (offset << 16) | mask;
     96}
     97
     98static inline u32 host1x_opcode_imm(unsigned offset, unsigned value)
     99{
    100	return (4 << 28) | (offset << 16) | value;
    101}
    102
    103static inline u32 host1x_opcode_imm_incr_syncpt(unsigned cond, unsigned indx)
    104{
    105	return host1x_opcode_imm(host1x_uclass_incr_syncpt_r(),
    106		host1x_class_host_incr_syncpt(cond, indx));
    107}
    108
    109static inline u32 host1x_opcode_restart(unsigned address)
    110{
    111	return (5 << 28) | (address >> 4);
    112}
    113
    114static inline u32 host1x_opcode_gather(unsigned count)
    115{
    116	return (6 << 28) | count;
    117}
    118
    119static inline u32 host1x_opcode_gather_nonincr(unsigned offset,	unsigned count)
    120{
    121	return (6 << 28) | (offset << 16) | BIT(15) | count;
    122}
    123
    124static inline u32 host1x_opcode_gather_incr(unsigned offset, unsigned count)
    125{
    126	return (6 << 28) | (offset << 16) | BIT(15) | BIT(14) | count;
    127}
    128
    129#define HOST1X_OPCODE_NOP host1x_opcode_nonincr(0, 0)
    130
    131#endif