smm665.c (20775B)
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Driver for SMM665 Power Controller / Monitor 4 * 5 * Copyright (C) 2010 Ericsson AB. 6 * 7 * This driver should also work for SMM465, SMM764, and SMM766, but is untested 8 * for those chips. Only monitoring functionality is implemented. 9 * 10 * Datasheets: 11 * http://www.summitmicro.com/prod_select/summary/SMM665/SMM665B_2089_20.pdf 12 * http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf 13 */ 14 15#include <linux/kernel.h> 16#include <linux/module.h> 17#include <linux/init.h> 18#include <linux/err.h> 19#include <linux/slab.h> 20#include <linux/i2c.h> 21#include <linux/hwmon.h> 22#include <linux/hwmon-sysfs.h> 23#include <linux/delay.h> 24#include <linux/jiffies.h> 25 26/* Internal reference voltage (VREF, x 1000 */ 27#define SMM665_VREF_ADC_X1000 1250 28 29/* module parameters */ 30static int vref = SMM665_VREF_ADC_X1000; 31module_param(vref, int, 0); 32MODULE_PARM_DESC(vref, "Reference voltage in mV"); 33 34enum chips { smm465, smm665, smm665c, smm764, smm766 }; 35 36/* 37 * ADC channel addresses 38 */ 39#define SMM665_MISC16_ADC_DATA_A 0x00 40#define SMM665_MISC16_ADC_DATA_B 0x01 41#define SMM665_MISC16_ADC_DATA_C 0x02 42#define SMM665_MISC16_ADC_DATA_D 0x03 43#define SMM665_MISC16_ADC_DATA_E 0x04 44#define SMM665_MISC16_ADC_DATA_F 0x05 45#define SMM665_MISC16_ADC_DATA_VDD 0x06 46#define SMM665_MISC16_ADC_DATA_12V 0x07 47#define SMM665_MISC16_ADC_DATA_INT_TEMP 0x08 48#define SMM665_MISC16_ADC_DATA_AIN1 0x09 49#define SMM665_MISC16_ADC_DATA_AIN2 0x0a 50 51/* 52 * Command registers 53 */ 54#define SMM665_MISC8_CMD_STS 0x80 55#define SMM665_MISC8_STATUS1 0x81 56#define SMM665_MISC8_STATUSS2 0x82 57#define SMM665_MISC8_IO_POLARITY 0x83 58#define SMM665_MISC8_PUP_POLARITY 0x84 59#define SMM665_MISC8_ADOC_STATUS1 0x85 60#define SMM665_MISC8_ADOC_STATUS2 0x86 61#define SMM665_MISC8_WRITE_PROT 0x87 62#define SMM665_MISC8_STS_TRACK 0x88 63 64/* 65 * Configuration registers and register groups 66 */ 67#define SMM665_ADOC_ENABLE 0x0d 68#define SMM665_LIMIT_BASE 0x80 /* First limit register */ 69 70/* 71 * Limit register bit masks 72 */ 73#define SMM665_TRIGGER_RST 0x8000 74#define SMM665_TRIGGER_HEALTHY 0x4000 75#define SMM665_TRIGGER_POWEROFF 0x2000 76#define SMM665_TRIGGER_SHUTDOWN 0x1000 77#define SMM665_ADC_MASK 0x03ff 78 79#define smm665_is_critical(lim) ((lim) & (SMM665_TRIGGER_RST \ 80 | SMM665_TRIGGER_POWEROFF \ 81 | SMM665_TRIGGER_SHUTDOWN)) 82/* 83 * Fault register bit definitions 84 * Values are merged from status registers 1/2, 85 * with status register 1 providing the upper 8 bits. 86 */ 87#define SMM665_FAULT_A 0x0001 88#define SMM665_FAULT_B 0x0002 89#define SMM665_FAULT_C 0x0004 90#define SMM665_FAULT_D 0x0008 91#define SMM665_FAULT_E 0x0010 92#define SMM665_FAULT_F 0x0020 93#define SMM665_FAULT_VDD 0x0040 94#define SMM665_FAULT_12V 0x0080 95#define SMM665_FAULT_TEMP 0x0100 96#define SMM665_FAULT_AIN1 0x0200 97#define SMM665_FAULT_AIN2 0x0400 98 99/* 100 * I2C Register addresses 101 * 102 * The configuration register needs to be the configured base register. 103 * The command/status register address is derived from it. 104 */ 105#define SMM665_REGMASK 0x78 106#define SMM665_CMDREG_BASE 0x48 107#define SMM665_CONFREG_BASE 0x50 108 109/* 110 * Equations given by chip manufacturer to calculate voltage/temperature values 111 * vref = Reference voltage on VREF_ADC pin (module parameter) 112 * adc = 10bit ADC value read back from registers 113 */ 114 115/* Voltage A-F and VDD */ 116#define SMM665_VMON_ADC_TO_VOLTS(adc) ((adc) * vref / 256) 117 118/* Voltage 12VIN */ 119#define SMM665_12VIN_ADC_TO_VOLTS(adc) ((adc) * vref * 3 / 256) 120 121/* Voltage AIN1, AIN2 */ 122#define SMM665_AIN_ADC_TO_VOLTS(adc) ((adc) * vref / 512) 123 124/* Temp Sensor */ 125#define SMM665_TEMP_ADC_TO_CELSIUS(adc) (((adc) <= 511) ? \ 126 ((int)(adc) * 1000 / 4) : \ 127 (((int)(adc) - 0x400) * 1000 / 4)) 128 129#define SMM665_NUM_ADC 11 130 131/* 132 * Chip dependent ADC conversion time, in uS 133 */ 134#define SMM665_ADC_WAIT_SMM665 70 135#define SMM665_ADC_WAIT_SMM766 185 136 137struct smm665_data { 138 enum chips type; 139 int conversion_time; /* ADC conversion time */ 140 struct i2c_client *client; 141 struct mutex update_lock; 142 bool valid; 143 unsigned long last_updated; /* in jiffies */ 144 u16 adc[SMM665_NUM_ADC]; /* adc values (raw) */ 145 u16 faults; /* fault status */ 146 /* The following values are in mV */ 147 int critical_min_limit[SMM665_NUM_ADC]; 148 int alarm_min_limit[SMM665_NUM_ADC]; 149 int critical_max_limit[SMM665_NUM_ADC]; 150 int alarm_max_limit[SMM665_NUM_ADC]; 151 struct i2c_client *cmdreg; 152}; 153 154/* 155 * smm665_read16() 156 * 157 * Read 16 bit value from <reg>, <reg+1>. Upper 8 bits are in <reg>. 158 */ 159static int smm665_read16(struct i2c_client *client, int reg) 160{ 161 int rv, val; 162 163 rv = i2c_smbus_read_byte_data(client, reg); 164 if (rv < 0) 165 return rv; 166 val = rv << 8; 167 rv = i2c_smbus_read_byte_data(client, reg + 1); 168 if (rv < 0) 169 return rv; 170 val |= rv; 171 return val; 172} 173 174/* 175 * Read adc value. 176 */ 177static int smm665_read_adc(struct smm665_data *data, int adc) 178{ 179 struct i2c_client *client = data->cmdreg; 180 int rv; 181 int radc; 182 183 /* 184 * Algorithm for reading ADC, per SMM665 datasheet 185 * 186 * {[S][addr][W][Ack]} {[offset][Ack]} {[S][addr][R][Nack]} 187 * [wait conversion time] 188 * {[S][addr][R][Ack]} {[datahi][Ack]} {[datalo][Ack][P]} 189 * 190 * To implement the first part of this exchange, 191 * do a full read transaction and expect a failure/Nack. 192 * This sets up the address pointer on the SMM665 193 * and starts the ADC conversion. 194 * Then do a two-byte read transaction. 195 */ 196 rv = i2c_smbus_read_byte_data(client, adc << 3); 197 if (rv != -ENXIO) { 198 /* 199 * We expect ENXIO to reflect NACK 200 * (per Documentation/i2c/fault-codes.rst). 201 * Everything else is an error. 202 */ 203 dev_dbg(&client->dev, 204 "Unexpected return code %d when setting ADC index", rv); 205 return (rv < 0) ? rv : -EIO; 206 } 207 208 udelay(data->conversion_time); 209 210 /* 211 * Now read two bytes. 212 * 213 * Neither i2c_smbus_read_byte() nor 214 * i2c_smbus_read_block_data() worked here, 215 * so use i2c_smbus_read_word_swapped() instead. 216 * We could also try to use i2c_master_recv(), 217 * but that is not always supported. 218 */ 219 rv = i2c_smbus_read_word_swapped(client, 0); 220 if (rv < 0) { 221 dev_dbg(&client->dev, "Failed to read ADC value: error %d", rv); 222 return rv; 223 } 224 /* 225 * Validate/verify readback adc channel (in bit 11..14). 226 */ 227 radc = (rv >> 11) & 0x0f; 228 if (radc != adc) { 229 dev_dbg(&client->dev, "Unexpected RADC: Expected %d got %d", 230 adc, radc); 231 return -EIO; 232 } 233 234 return rv & SMM665_ADC_MASK; 235} 236 237static struct smm665_data *smm665_update_device(struct device *dev) 238{ 239 struct smm665_data *data = dev_get_drvdata(dev); 240 struct i2c_client *client = data->client; 241 struct smm665_data *ret = data; 242 243 mutex_lock(&data->update_lock); 244 245 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { 246 int i, val; 247 248 /* 249 * read status registers 250 */ 251 val = smm665_read16(client, SMM665_MISC8_STATUS1); 252 if (unlikely(val < 0)) { 253 ret = ERR_PTR(val); 254 goto abort; 255 } 256 data->faults = val; 257 258 /* Read adc registers */ 259 for (i = 0; i < SMM665_NUM_ADC; i++) { 260 val = smm665_read_adc(data, i); 261 if (unlikely(val < 0)) { 262 ret = ERR_PTR(val); 263 goto abort; 264 } 265 data->adc[i] = val; 266 } 267 data->last_updated = jiffies; 268 data->valid = true; 269 } 270abort: 271 mutex_unlock(&data->update_lock); 272 return ret; 273} 274 275/* Return converted value from given adc */ 276static int smm665_convert(u16 adcval, int index) 277{ 278 int val = 0; 279 280 switch (index) { 281 case SMM665_MISC16_ADC_DATA_12V: 282 val = SMM665_12VIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK); 283 break; 284 285 case SMM665_MISC16_ADC_DATA_VDD: 286 case SMM665_MISC16_ADC_DATA_A: 287 case SMM665_MISC16_ADC_DATA_B: 288 case SMM665_MISC16_ADC_DATA_C: 289 case SMM665_MISC16_ADC_DATA_D: 290 case SMM665_MISC16_ADC_DATA_E: 291 case SMM665_MISC16_ADC_DATA_F: 292 val = SMM665_VMON_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK); 293 break; 294 295 case SMM665_MISC16_ADC_DATA_AIN1: 296 case SMM665_MISC16_ADC_DATA_AIN2: 297 val = SMM665_AIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK); 298 break; 299 300 case SMM665_MISC16_ADC_DATA_INT_TEMP: 301 val = SMM665_TEMP_ADC_TO_CELSIUS(adcval & SMM665_ADC_MASK); 302 break; 303 304 default: 305 /* If we get here, the developer messed up */ 306 WARN_ON_ONCE(1); 307 break; 308 } 309 310 return val; 311} 312 313static int smm665_get_min(struct device *dev, int index) 314{ 315 struct smm665_data *data = dev_get_drvdata(dev); 316 317 return data->alarm_min_limit[index]; 318} 319 320static int smm665_get_max(struct device *dev, int index) 321{ 322 struct smm665_data *data = dev_get_drvdata(dev); 323 324 return data->alarm_max_limit[index]; 325} 326 327static int smm665_get_lcrit(struct device *dev, int index) 328{ 329 struct smm665_data *data = dev_get_drvdata(dev); 330 331 return data->critical_min_limit[index]; 332} 333 334static int smm665_get_crit(struct device *dev, int index) 335{ 336 struct smm665_data *data = dev_get_drvdata(dev); 337 338 return data->critical_max_limit[index]; 339} 340 341static ssize_t smm665_show_crit_alarm(struct device *dev, 342 struct device_attribute *da, char *buf) 343{ 344 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 345 struct smm665_data *data = smm665_update_device(dev); 346 int val = 0; 347 348 if (IS_ERR(data)) 349 return PTR_ERR(data); 350 351 if (data->faults & (1 << attr->index)) 352 val = 1; 353 354 return sysfs_emit(buf, "%d\n", val); 355} 356 357static ssize_t smm665_show_input(struct device *dev, 358 struct device_attribute *da, char *buf) 359{ 360 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 361 struct smm665_data *data = smm665_update_device(dev); 362 int adc = attr->index; 363 int val; 364 365 if (IS_ERR(data)) 366 return PTR_ERR(data); 367 368 val = smm665_convert(data->adc[adc], adc); 369 return sysfs_emit(buf, "%d\n", val); 370} 371 372#define SMM665_SHOW(what) \ 373static ssize_t smm665_show_##what(struct device *dev, \ 374 struct device_attribute *da, char *buf) \ 375{ \ 376 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 377 const int val = smm665_get_##what(dev, attr->index); \ 378 return snprintf(buf, PAGE_SIZE, "%d\n", val); \ 379} 380 381SMM665_SHOW(min); 382SMM665_SHOW(max); 383SMM665_SHOW(lcrit); 384SMM665_SHOW(crit); 385 386/* 387 * These macros are used below in constructing device attribute objects 388 * for use with sysfs_create_group() to make a sysfs device file 389 * for each register. 390 */ 391 392#define SMM665_ATTR(name, type, cmd_idx) \ 393 static SENSOR_DEVICE_ATTR(name##_##type, S_IRUGO, \ 394 smm665_show_##type, NULL, cmd_idx) 395 396/* Construct a sensor_device_attribute structure for each register */ 397 398/* Input voltages */ 399SMM665_ATTR(in1, input, SMM665_MISC16_ADC_DATA_12V); 400SMM665_ATTR(in2, input, SMM665_MISC16_ADC_DATA_VDD); 401SMM665_ATTR(in3, input, SMM665_MISC16_ADC_DATA_A); 402SMM665_ATTR(in4, input, SMM665_MISC16_ADC_DATA_B); 403SMM665_ATTR(in5, input, SMM665_MISC16_ADC_DATA_C); 404SMM665_ATTR(in6, input, SMM665_MISC16_ADC_DATA_D); 405SMM665_ATTR(in7, input, SMM665_MISC16_ADC_DATA_E); 406SMM665_ATTR(in8, input, SMM665_MISC16_ADC_DATA_F); 407SMM665_ATTR(in9, input, SMM665_MISC16_ADC_DATA_AIN1); 408SMM665_ATTR(in10, input, SMM665_MISC16_ADC_DATA_AIN2); 409 410/* Input voltages min */ 411SMM665_ATTR(in1, min, SMM665_MISC16_ADC_DATA_12V); 412SMM665_ATTR(in2, min, SMM665_MISC16_ADC_DATA_VDD); 413SMM665_ATTR(in3, min, SMM665_MISC16_ADC_DATA_A); 414SMM665_ATTR(in4, min, SMM665_MISC16_ADC_DATA_B); 415SMM665_ATTR(in5, min, SMM665_MISC16_ADC_DATA_C); 416SMM665_ATTR(in6, min, SMM665_MISC16_ADC_DATA_D); 417SMM665_ATTR(in7, min, SMM665_MISC16_ADC_DATA_E); 418SMM665_ATTR(in8, min, SMM665_MISC16_ADC_DATA_F); 419SMM665_ATTR(in9, min, SMM665_MISC16_ADC_DATA_AIN1); 420SMM665_ATTR(in10, min, SMM665_MISC16_ADC_DATA_AIN2); 421 422/* Input voltages max */ 423SMM665_ATTR(in1, max, SMM665_MISC16_ADC_DATA_12V); 424SMM665_ATTR(in2, max, SMM665_MISC16_ADC_DATA_VDD); 425SMM665_ATTR(in3, max, SMM665_MISC16_ADC_DATA_A); 426SMM665_ATTR(in4, max, SMM665_MISC16_ADC_DATA_B); 427SMM665_ATTR(in5, max, SMM665_MISC16_ADC_DATA_C); 428SMM665_ATTR(in6, max, SMM665_MISC16_ADC_DATA_D); 429SMM665_ATTR(in7, max, SMM665_MISC16_ADC_DATA_E); 430SMM665_ATTR(in8, max, SMM665_MISC16_ADC_DATA_F); 431SMM665_ATTR(in9, max, SMM665_MISC16_ADC_DATA_AIN1); 432SMM665_ATTR(in10, max, SMM665_MISC16_ADC_DATA_AIN2); 433 434/* Input voltages lcrit */ 435SMM665_ATTR(in1, lcrit, SMM665_MISC16_ADC_DATA_12V); 436SMM665_ATTR(in2, lcrit, SMM665_MISC16_ADC_DATA_VDD); 437SMM665_ATTR(in3, lcrit, SMM665_MISC16_ADC_DATA_A); 438SMM665_ATTR(in4, lcrit, SMM665_MISC16_ADC_DATA_B); 439SMM665_ATTR(in5, lcrit, SMM665_MISC16_ADC_DATA_C); 440SMM665_ATTR(in6, lcrit, SMM665_MISC16_ADC_DATA_D); 441SMM665_ATTR(in7, lcrit, SMM665_MISC16_ADC_DATA_E); 442SMM665_ATTR(in8, lcrit, SMM665_MISC16_ADC_DATA_F); 443SMM665_ATTR(in9, lcrit, SMM665_MISC16_ADC_DATA_AIN1); 444SMM665_ATTR(in10, lcrit, SMM665_MISC16_ADC_DATA_AIN2); 445 446/* Input voltages crit */ 447SMM665_ATTR(in1, crit, SMM665_MISC16_ADC_DATA_12V); 448SMM665_ATTR(in2, crit, SMM665_MISC16_ADC_DATA_VDD); 449SMM665_ATTR(in3, crit, SMM665_MISC16_ADC_DATA_A); 450SMM665_ATTR(in4, crit, SMM665_MISC16_ADC_DATA_B); 451SMM665_ATTR(in5, crit, SMM665_MISC16_ADC_DATA_C); 452SMM665_ATTR(in6, crit, SMM665_MISC16_ADC_DATA_D); 453SMM665_ATTR(in7, crit, SMM665_MISC16_ADC_DATA_E); 454SMM665_ATTR(in8, crit, SMM665_MISC16_ADC_DATA_F); 455SMM665_ATTR(in9, crit, SMM665_MISC16_ADC_DATA_AIN1); 456SMM665_ATTR(in10, crit, SMM665_MISC16_ADC_DATA_AIN2); 457 458/* critical alarms */ 459SMM665_ATTR(in1, crit_alarm, SMM665_FAULT_12V); 460SMM665_ATTR(in2, crit_alarm, SMM665_FAULT_VDD); 461SMM665_ATTR(in3, crit_alarm, SMM665_FAULT_A); 462SMM665_ATTR(in4, crit_alarm, SMM665_FAULT_B); 463SMM665_ATTR(in5, crit_alarm, SMM665_FAULT_C); 464SMM665_ATTR(in6, crit_alarm, SMM665_FAULT_D); 465SMM665_ATTR(in7, crit_alarm, SMM665_FAULT_E); 466SMM665_ATTR(in8, crit_alarm, SMM665_FAULT_F); 467SMM665_ATTR(in9, crit_alarm, SMM665_FAULT_AIN1); 468SMM665_ATTR(in10, crit_alarm, SMM665_FAULT_AIN2); 469 470/* Temperature */ 471SMM665_ATTR(temp1, input, SMM665_MISC16_ADC_DATA_INT_TEMP); 472SMM665_ATTR(temp1, min, SMM665_MISC16_ADC_DATA_INT_TEMP); 473SMM665_ATTR(temp1, max, SMM665_MISC16_ADC_DATA_INT_TEMP); 474SMM665_ATTR(temp1, lcrit, SMM665_MISC16_ADC_DATA_INT_TEMP); 475SMM665_ATTR(temp1, crit, SMM665_MISC16_ADC_DATA_INT_TEMP); 476SMM665_ATTR(temp1, crit_alarm, SMM665_FAULT_TEMP); 477 478/* 479 * Finally, construct an array of pointers to members of the above objects, 480 * as required for sysfs_create_group() 481 */ 482static struct attribute *smm665_attrs[] = { 483 &sensor_dev_attr_in1_input.dev_attr.attr, 484 &sensor_dev_attr_in1_min.dev_attr.attr, 485 &sensor_dev_attr_in1_max.dev_attr.attr, 486 &sensor_dev_attr_in1_lcrit.dev_attr.attr, 487 &sensor_dev_attr_in1_crit.dev_attr.attr, 488 &sensor_dev_attr_in1_crit_alarm.dev_attr.attr, 489 490 &sensor_dev_attr_in2_input.dev_attr.attr, 491 &sensor_dev_attr_in2_min.dev_attr.attr, 492 &sensor_dev_attr_in2_max.dev_attr.attr, 493 &sensor_dev_attr_in2_lcrit.dev_attr.attr, 494 &sensor_dev_attr_in2_crit.dev_attr.attr, 495 &sensor_dev_attr_in2_crit_alarm.dev_attr.attr, 496 497 &sensor_dev_attr_in3_input.dev_attr.attr, 498 &sensor_dev_attr_in3_min.dev_attr.attr, 499 &sensor_dev_attr_in3_max.dev_attr.attr, 500 &sensor_dev_attr_in3_lcrit.dev_attr.attr, 501 &sensor_dev_attr_in3_crit.dev_attr.attr, 502 &sensor_dev_attr_in3_crit_alarm.dev_attr.attr, 503 504 &sensor_dev_attr_in4_input.dev_attr.attr, 505 &sensor_dev_attr_in4_min.dev_attr.attr, 506 &sensor_dev_attr_in4_max.dev_attr.attr, 507 &sensor_dev_attr_in4_lcrit.dev_attr.attr, 508 &sensor_dev_attr_in4_crit.dev_attr.attr, 509 &sensor_dev_attr_in4_crit_alarm.dev_attr.attr, 510 511 &sensor_dev_attr_in5_input.dev_attr.attr, 512 &sensor_dev_attr_in5_min.dev_attr.attr, 513 &sensor_dev_attr_in5_max.dev_attr.attr, 514 &sensor_dev_attr_in5_lcrit.dev_attr.attr, 515 &sensor_dev_attr_in5_crit.dev_attr.attr, 516 &sensor_dev_attr_in5_crit_alarm.dev_attr.attr, 517 518 &sensor_dev_attr_in6_input.dev_attr.attr, 519 &sensor_dev_attr_in6_min.dev_attr.attr, 520 &sensor_dev_attr_in6_max.dev_attr.attr, 521 &sensor_dev_attr_in6_lcrit.dev_attr.attr, 522 &sensor_dev_attr_in6_crit.dev_attr.attr, 523 &sensor_dev_attr_in6_crit_alarm.dev_attr.attr, 524 525 &sensor_dev_attr_in7_input.dev_attr.attr, 526 &sensor_dev_attr_in7_min.dev_attr.attr, 527 &sensor_dev_attr_in7_max.dev_attr.attr, 528 &sensor_dev_attr_in7_lcrit.dev_attr.attr, 529 &sensor_dev_attr_in7_crit.dev_attr.attr, 530 &sensor_dev_attr_in7_crit_alarm.dev_attr.attr, 531 532 &sensor_dev_attr_in8_input.dev_attr.attr, 533 &sensor_dev_attr_in8_min.dev_attr.attr, 534 &sensor_dev_attr_in8_max.dev_attr.attr, 535 &sensor_dev_attr_in8_lcrit.dev_attr.attr, 536 &sensor_dev_attr_in8_crit.dev_attr.attr, 537 &sensor_dev_attr_in8_crit_alarm.dev_attr.attr, 538 539 &sensor_dev_attr_in9_input.dev_attr.attr, 540 &sensor_dev_attr_in9_min.dev_attr.attr, 541 &sensor_dev_attr_in9_max.dev_attr.attr, 542 &sensor_dev_attr_in9_lcrit.dev_attr.attr, 543 &sensor_dev_attr_in9_crit.dev_attr.attr, 544 &sensor_dev_attr_in9_crit_alarm.dev_attr.attr, 545 546 &sensor_dev_attr_in10_input.dev_attr.attr, 547 &sensor_dev_attr_in10_min.dev_attr.attr, 548 &sensor_dev_attr_in10_max.dev_attr.attr, 549 &sensor_dev_attr_in10_lcrit.dev_attr.attr, 550 &sensor_dev_attr_in10_crit.dev_attr.attr, 551 &sensor_dev_attr_in10_crit_alarm.dev_attr.attr, 552 553 &sensor_dev_attr_temp1_input.dev_attr.attr, 554 &sensor_dev_attr_temp1_min.dev_attr.attr, 555 &sensor_dev_attr_temp1_max.dev_attr.attr, 556 &sensor_dev_attr_temp1_lcrit.dev_attr.attr, 557 &sensor_dev_attr_temp1_crit.dev_attr.attr, 558 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, 559 560 NULL, 561}; 562 563ATTRIBUTE_GROUPS(smm665); 564 565static const struct i2c_device_id smm665_id[]; 566 567static int smm665_probe(struct i2c_client *client) 568{ 569 struct i2c_adapter *adapter = client->adapter; 570 struct smm665_data *data; 571 struct device *hwmon_dev; 572 int i, ret; 573 574 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA 575 | I2C_FUNC_SMBUS_WORD_DATA)) 576 return -ENODEV; 577 578 if (i2c_smbus_read_byte_data(client, SMM665_ADOC_ENABLE) < 0) 579 return -ENODEV; 580 581 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); 582 if (!data) 583 return -ENOMEM; 584 585 i2c_set_clientdata(client, data); 586 mutex_init(&data->update_lock); 587 588 data->client = client; 589 data->type = i2c_match_id(smm665_id, client)->driver_data; 590 data->cmdreg = i2c_new_dummy_device(adapter, (client->addr & ~SMM665_REGMASK) 591 | SMM665_CMDREG_BASE); 592 if (IS_ERR(data->cmdreg)) 593 return PTR_ERR(data->cmdreg); 594 595 switch (data->type) { 596 case smm465: 597 case smm665: 598 data->conversion_time = SMM665_ADC_WAIT_SMM665; 599 break; 600 case smm665c: 601 case smm764: 602 case smm766: 603 data->conversion_time = SMM665_ADC_WAIT_SMM766; 604 break; 605 } 606 607 ret = -ENODEV; 608 if (i2c_smbus_read_byte_data(data->cmdreg, SMM665_MISC8_CMD_STS) < 0) 609 goto out_unregister; 610 611 /* 612 * Read limits. 613 * 614 * Limit registers start with register SMM665_LIMIT_BASE. 615 * Each channel uses 8 registers, providing four limit values 616 * per channel. Each limit value requires two registers, with the 617 * high byte in the first register and the low byte in the second 618 * register. The first two limits are under limit values, followed 619 * by two over limit values. 620 * 621 * Limit register order matches the ADC register order, so we use 622 * ADC register defines throughout the code to index limit registers. 623 * 624 * We save the first retrieved value both as "critical" and "alarm" 625 * value. The second value overwrites either the critical or the 626 * alarm value, depending on its configuration. This ensures that both 627 * critical and alarm values are initialized, even if both registers are 628 * configured as critical or non-critical. 629 */ 630 for (i = 0; i < SMM665_NUM_ADC; i++) { 631 int val; 632 633 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8); 634 if (unlikely(val < 0)) 635 goto out_unregister; 636 data->critical_min_limit[i] = data->alarm_min_limit[i] 637 = smm665_convert(val, i); 638 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 2); 639 if (unlikely(val < 0)) 640 goto out_unregister; 641 if (smm665_is_critical(val)) 642 data->critical_min_limit[i] = smm665_convert(val, i); 643 else 644 data->alarm_min_limit[i] = smm665_convert(val, i); 645 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 4); 646 if (unlikely(val < 0)) 647 goto out_unregister; 648 data->critical_max_limit[i] = data->alarm_max_limit[i] 649 = smm665_convert(val, i); 650 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 6); 651 if (unlikely(val < 0)) 652 goto out_unregister; 653 if (smm665_is_critical(val)) 654 data->critical_max_limit[i] = smm665_convert(val, i); 655 else 656 data->alarm_max_limit[i] = smm665_convert(val, i); 657 } 658 659 hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev, 660 client->name, data, 661 smm665_groups); 662 if (IS_ERR(hwmon_dev)) { 663 ret = PTR_ERR(hwmon_dev); 664 goto out_unregister; 665 } 666 667 return 0; 668 669out_unregister: 670 i2c_unregister_device(data->cmdreg); 671 return ret; 672} 673 674static int smm665_remove(struct i2c_client *client) 675{ 676 struct smm665_data *data = i2c_get_clientdata(client); 677 678 i2c_unregister_device(data->cmdreg); 679 return 0; 680} 681 682static const struct i2c_device_id smm665_id[] = { 683 {"smm465", smm465}, 684 {"smm665", smm665}, 685 {"smm665c", smm665c}, 686 {"smm764", smm764}, 687 {"smm766", smm766}, 688 {} 689}; 690 691MODULE_DEVICE_TABLE(i2c, smm665_id); 692 693/* This is the driver that will be inserted */ 694static struct i2c_driver smm665_driver = { 695 .driver = { 696 .name = "smm665", 697 }, 698 .probe_new = smm665_probe, 699 .remove = smm665_remove, 700 .id_table = smm665_id, 701}; 702 703module_i2c_driver(smm665_driver); 704 705MODULE_AUTHOR("Guenter Roeck"); 706MODULE_DESCRIPTION("SMM665 driver"); 707MODULE_LICENSE("GPL");