coresight-trbe.h (3220B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * This contains all required hardware related helper functions for 4 * Trace Buffer Extension (TRBE) driver in the coresight framework. 5 * 6 * Copyright (C) 2020 ARM Ltd. 7 * 8 * Author: Anshuman Khandual <anshuman.khandual@arm.com> 9 */ 10#include <linux/coresight.h> 11#include <linux/device.h> 12#include <linux/irq.h> 13#include <linux/kernel.h> 14#include <linux/of.h> 15#include <linux/platform_device.h> 16#include <linux/smp.h> 17 18#include "coresight-etm-perf.h" 19 20static inline bool is_trbe_available(void) 21{ 22 u64 aa64dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1); 23 unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0, ID_AA64DFR0_TRBE_SHIFT); 24 25 return trbe >= 0b0001; 26} 27 28static inline bool is_trbe_enabled(void) 29{ 30 u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); 31 32 return trblimitr & TRBLIMITR_ENABLE; 33} 34 35#define TRBE_EC_OTHERS 0 36#define TRBE_EC_STAGE1_ABORT 36 37#define TRBE_EC_STAGE2_ABORT 37 38 39static inline int get_trbe_ec(u64 trbsr) 40{ 41 return (trbsr >> TRBSR_EC_SHIFT) & TRBSR_EC_MASK; 42} 43 44#define TRBE_BSC_NOT_STOPPED 0 45#define TRBE_BSC_FILLED 1 46#define TRBE_BSC_TRIGGERED 2 47 48static inline int get_trbe_bsc(u64 trbsr) 49{ 50 return (trbsr >> TRBSR_BSC_SHIFT) & TRBSR_BSC_MASK; 51} 52 53static inline void clr_trbe_irq(void) 54{ 55 u64 trbsr = read_sysreg_s(SYS_TRBSR_EL1); 56 57 trbsr &= ~TRBSR_IRQ; 58 write_sysreg_s(trbsr, SYS_TRBSR_EL1); 59} 60 61static inline bool is_trbe_irq(u64 trbsr) 62{ 63 return trbsr & TRBSR_IRQ; 64} 65 66static inline bool is_trbe_trg(u64 trbsr) 67{ 68 return trbsr & TRBSR_TRG; 69} 70 71static inline bool is_trbe_wrap(u64 trbsr) 72{ 73 return trbsr & TRBSR_WRAP; 74} 75 76static inline bool is_trbe_abort(u64 trbsr) 77{ 78 return trbsr & TRBSR_ABORT; 79} 80 81static inline bool is_trbe_running(u64 trbsr) 82{ 83 return !(trbsr & TRBSR_STOP); 84} 85 86#define TRBE_TRIG_MODE_STOP 0 87#define TRBE_TRIG_MODE_IRQ 1 88#define TRBE_TRIG_MODE_IGNORE 3 89 90#define TRBE_FILL_MODE_FILL 0 91#define TRBE_FILL_MODE_WRAP 1 92#define TRBE_FILL_MODE_CIRCULAR_BUFFER 3 93 94static inline bool get_trbe_flag_update(u64 trbidr) 95{ 96 return trbidr & TRBIDR_FLAG; 97} 98 99static inline bool is_trbe_programmable(u64 trbidr) 100{ 101 return !(trbidr & TRBIDR_PROG); 102} 103 104static inline int get_trbe_address_align(u64 trbidr) 105{ 106 return (trbidr >> TRBIDR_ALIGN_SHIFT) & TRBIDR_ALIGN_MASK; 107} 108 109static inline unsigned long get_trbe_write_pointer(void) 110{ 111 return read_sysreg_s(SYS_TRBPTR_EL1); 112} 113 114static inline void set_trbe_write_pointer(unsigned long addr) 115{ 116 WARN_ON(is_trbe_enabled()); 117 write_sysreg_s(addr, SYS_TRBPTR_EL1); 118} 119 120static inline unsigned long get_trbe_limit_pointer(void) 121{ 122 u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); 123 unsigned long addr = trblimitr & (TRBLIMITR_LIMIT_MASK << TRBLIMITR_LIMIT_SHIFT); 124 125 WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); 126 return addr; 127} 128 129static inline unsigned long get_trbe_base_pointer(void) 130{ 131 u64 trbbaser = read_sysreg_s(SYS_TRBBASER_EL1); 132 unsigned long addr = trbbaser & (TRBBASER_BASE_MASK << TRBBASER_BASE_SHIFT); 133 134 WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); 135 return addr; 136} 137 138static inline void set_trbe_base_pointer(unsigned long addr) 139{ 140 WARN_ON(is_trbe_enabled()); 141 WARN_ON(!IS_ALIGNED(addr, (1UL << TRBBASER_BASE_SHIFT))); 142 WARN_ON(!IS_ALIGNED(addr, PAGE_SIZE)); 143 write_sysreg_s(addr, SYS_TRBBASER_EL1); 144}