cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i2c-cht-wc.c (14986B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Intel CHT Whiskey Cove PMIC I2C Master driver
      4 * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
      5 *
      6 * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
      7 * Copyright (C) 2011 - 2014 Intel Corporation. All rights reserved.
      8 */
      9
     10#include <linux/acpi.h>
     11#include <linux/completion.h>
     12#include <linux/delay.h>
     13#include <linux/i2c.h>
     14#include <linux/interrupt.h>
     15#include <linux/irq.h>
     16#include <linux/irqdomain.h>
     17#include <linux/mfd/intel_soc_pmic.h>
     18#include <linux/module.h>
     19#include <linux/platform_device.h>
     20#include <linux/power/bq24190_charger.h>
     21#include <linux/power/bq25890_charger.h>
     22#include <linux/slab.h>
     23
     24#define CHT_WC_I2C_CTRL			0x5e24
     25#define CHT_WC_I2C_CTRL_WR		BIT(0)
     26#define CHT_WC_I2C_CTRL_RD		BIT(1)
     27#define CHT_WC_I2C_CLIENT_ADDR		0x5e25
     28#define CHT_WC_I2C_REG_OFFSET		0x5e26
     29#define CHT_WC_I2C_WRDATA		0x5e27
     30#define CHT_WC_I2C_RDDATA		0x5e28
     31
     32#define CHT_WC_EXTCHGRIRQ		0x6e0a
     33#define CHT_WC_EXTCHGRIRQ_CLIENT_IRQ	BIT(0)
     34#define CHT_WC_EXTCHGRIRQ_WRITE_IRQ	BIT(1)
     35#define CHT_WC_EXTCHGRIRQ_READ_IRQ	BIT(2)
     36#define CHT_WC_EXTCHGRIRQ_NACK_IRQ	BIT(3)
     37#define CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK	((u8)GENMASK(3, 1))
     38#define CHT_WC_EXTCHGRIRQ_MSK		0x6e17
     39
     40struct cht_wc_i2c_adap {
     41	struct i2c_adapter adapter;
     42	wait_queue_head_t wait;
     43	struct irq_chip irqchip;
     44	struct mutex adap_lock;
     45	struct mutex irqchip_lock;
     46	struct regmap *regmap;
     47	struct irq_domain *irq_domain;
     48	struct i2c_client *client;
     49	int client_irq;
     50	u8 irq_mask;
     51	u8 old_irq_mask;
     52	int read_data;
     53	bool io_error;
     54	bool done;
     55};
     56
     57static irqreturn_t cht_wc_i2c_adap_thread_handler(int id, void *data)
     58{
     59	struct cht_wc_i2c_adap *adap = data;
     60	int ret, reg;
     61
     62	mutex_lock(&adap->adap_lock);
     63
     64	/* Read IRQs */
     65	ret = regmap_read(adap->regmap, CHT_WC_EXTCHGRIRQ, &reg);
     66	if (ret) {
     67		dev_err(&adap->adapter.dev, "Error reading extchgrirq reg\n");
     68		mutex_unlock(&adap->adap_lock);
     69		return IRQ_NONE;
     70	}
     71
     72	reg &= ~adap->irq_mask;
     73
     74	/* Reads must be acked after reading the received data. */
     75	ret = regmap_read(adap->regmap, CHT_WC_I2C_RDDATA, &adap->read_data);
     76	if (ret)
     77		adap->io_error = true;
     78
     79	/*
     80	 * Immediately ack IRQs, so that if new IRQs arrives while we're
     81	 * handling the previous ones our irq will re-trigger when we're done.
     82	 */
     83	ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, reg);
     84	if (ret)
     85		dev_err(&adap->adapter.dev, "Error writing extchgrirq reg\n");
     86
     87	if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK) {
     88		adap->io_error |= !!(reg & CHT_WC_EXTCHGRIRQ_NACK_IRQ);
     89		adap->done = true;
     90	}
     91
     92	mutex_unlock(&adap->adap_lock);
     93
     94	if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK)
     95		wake_up(&adap->wait);
     96
     97	/*
     98	 * Do NOT use handle_nested_irq here, the client irq handler will
     99	 * likely want to do i2c transfers and the i2c controller uses this
    100	 * interrupt handler as well, so running the client irq handler from
    101	 * this thread will cause things to lock up.
    102	 */
    103	if (reg & CHT_WC_EXTCHGRIRQ_CLIENT_IRQ)
    104		generic_handle_irq_safe(adap->client_irq);
    105
    106	return IRQ_HANDLED;
    107}
    108
    109static u32 cht_wc_i2c_adap_master_func(struct i2c_adapter *adap)
    110{
    111	/* This i2c adapter only supports SMBUS byte transfers */
    112	return I2C_FUNC_SMBUS_BYTE_DATA;
    113}
    114
    115static int cht_wc_i2c_adap_smbus_xfer(struct i2c_adapter *_adap, u16 addr,
    116				      unsigned short flags, char read_write,
    117				      u8 command, int size,
    118				      union i2c_smbus_data *data)
    119{
    120	struct cht_wc_i2c_adap *adap = i2c_get_adapdata(_adap);
    121	int ret;
    122
    123	mutex_lock(&adap->adap_lock);
    124	adap->io_error = false;
    125	adap->done = false;
    126	mutex_unlock(&adap->adap_lock);
    127
    128	ret = regmap_write(adap->regmap, CHT_WC_I2C_CLIENT_ADDR, addr);
    129	if (ret)
    130		return ret;
    131
    132	if (read_write == I2C_SMBUS_WRITE) {
    133		ret = regmap_write(adap->regmap, CHT_WC_I2C_WRDATA, data->byte);
    134		if (ret)
    135			return ret;
    136	}
    137
    138	ret = regmap_write(adap->regmap, CHT_WC_I2C_REG_OFFSET, command);
    139	if (ret)
    140		return ret;
    141
    142	ret = regmap_write(adap->regmap, CHT_WC_I2C_CTRL,
    143			   (read_write == I2C_SMBUS_WRITE) ?
    144			   CHT_WC_I2C_CTRL_WR : CHT_WC_I2C_CTRL_RD);
    145	if (ret)
    146		return ret;
    147
    148	ret = wait_event_timeout(adap->wait, adap->done, msecs_to_jiffies(30));
    149	if (ret == 0) {
    150		/*
    151		 * The CHT GPIO controller serializes all IRQs, sometimes
    152		 * causing significant delays, check status manually.
    153		 */
    154		cht_wc_i2c_adap_thread_handler(0, adap);
    155		if (!adap->done)
    156			return -ETIMEDOUT;
    157	}
    158
    159	ret = 0;
    160	mutex_lock(&adap->adap_lock);
    161	if (adap->io_error)
    162		ret = -EIO;
    163	else if (read_write == I2C_SMBUS_READ)
    164		data->byte = adap->read_data;
    165	mutex_unlock(&adap->adap_lock);
    166
    167	return ret;
    168}
    169
    170static const struct i2c_algorithm cht_wc_i2c_adap_algo = {
    171	.functionality = cht_wc_i2c_adap_master_func,
    172	.smbus_xfer = cht_wc_i2c_adap_smbus_xfer,
    173};
    174
    175/*
    176 * We are an i2c-adapter which itself is part of an i2c-client. This means that
    177 * transfers done through us take adapter->bus_lock twice, once for our parent
    178 * i2c-adapter and once to take our own bus_lock. Lockdep does not like this
    179 * nested locking, to make lockdep happy in the case of busses with muxes, the
    180 * i2c-core's i2c_adapter_lock_bus function calls:
    181 * rt_mutex_lock_nested(&adapter->bus_lock, i2c_adapter_depth(adapter));
    182 *
    183 * But i2c_adapter_depth only works when the direct parent of the adapter is
    184 * another adapter, as it is only meant for muxes. In our case there is an
    185 * i2c-client and MFD instantiated platform_device in the parent->child chain
    186 * between the 2 devices.
    187 *
    188 * So we override the default i2c_lock_operations and pass a hardcoded
    189 * depth of 1 to rt_mutex_lock_nested, to make lockdep happy.
    190 *
    191 * Note that if there were to be a mux attached to our adapter, this would
    192 * break things again since the i2c-mux code expects the root-adapter to have
    193 * a locking depth of 0. But we always have only 1 client directly attached
    194 * in the form of the Charger IC paired with the CHT Whiskey Cove PMIC.
    195 */
    196static void cht_wc_i2c_adap_lock_bus(struct i2c_adapter *adapter,
    197				 unsigned int flags)
    198{
    199	rt_mutex_lock_nested(&adapter->bus_lock, 1);
    200}
    201
    202static int cht_wc_i2c_adap_trylock_bus(struct i2c_adapter *adapter,
    203				   unsigned int flags)
    204{
    205	return rt_mutex_trylock(&adapter->bus_lock);
    206}
    207
    208static void cht_wc_i2c_adap_unlock_bus(struct i2c_adapter *adapter,
    209				   unsigned int flags)
    210{
    211	rt_mutex_unlock(&adapter->bus_lock);
    212}
    213
    214static const struct i2c_lock_operations cht_wc_i2c_adap_lock_ops = {
    215	.lock_bus =    cht_wc_i2c_adap_lock_bus,
    216	.trylock_bus = cht_wc_i2c_adap_trylock_bus,
    217	.unlock_bus =  cht_wc_i2c_adap_unlock_bus,
    218};
    219
    220/**** irqchip for the client connected to the extchgr i2c adapter ****/
    221static void cht_wc_i2c_irq_lock(struct irq_data *data)
    222{
    223	struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
    224
    225	mutex_lock(&adap->irqchip_lock);
    226}
    227
    228static void cht_wc_i2c_irq_sync_unlock(struct irq_data *data)
    229{
    230	struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
    231	int ret;
    232
    233	if (adap->irq_mask != adap->old_irq_mask) {
    234		ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK,
    235				   adap->irq_mask);
    236		if (ret == 0)
    237			adap->old_irq_mask = adap->irq_mask;
    238		else
    239			dev_err(&adap->adapter.dev, "Error writing EXTCHGRIRQ_MSK\n");
    240	}
    241
    242	mutex_unlock(&adap->irqchip_lock);
    243}
    244
    245static void cht_wc_i2c_irq_enable(struct irq_data *data)
    246{
    247	struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
    248
    249	adap->irq_mask &= ~CHT_WC_EXTCHGRIRQ_CLIENT_IRQ;
    250}
    251
    252static void cht_wc_i2c_irq_disable(struct irq_data *data)
    253{
    254	struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
    255
    256	adap->irq_mask |= CHT_WC_EXTCHGRIRQ_CLIENT_IRQ;
    257}
    258
    259static const struct irq_chip cht_wc_i2c_irq_chip = {
    260	.irq_bus_lock		= cht_wc_i2c_irq_lock,
    261	.irq_bus_sync_unlock	= cht_wc_i2c_irq_sync_unlock,
    262	.irq_disable		= cht_wc_i2c_irq_disable,
    263	.irq_enable		= cht_wc_i2c_irq_enable,
    264	.name			= "cht_wc_ext_chrg_irq_chip",
    265};
    266
    267/********** GPD Win / Pocket charger IC settings **********/
    268static const char * const bq24190_suppliers[] = {
    269	"tcpm-source-psy-i2c-fusb302" };
    270
    271static const struct property_entry bq24190_props[] = {
    272	PROPERTY_ENTRY_STRING_ARRAY("supplied-from", bq24190_suppliers),
    273	PROPERTY_ENTRY_BOOL("omit-battery-class"),
    274	PROPERTY_ENTRY_BOOL("disable-reset"),
    275	{ }
    276};
    277
    278static const struct software_node bq24190_node = {
    279	.properties = bq24190_props,
    280};
    281
    282static struct regulator_consumer_supply fusb302_consumer = {
    283	.supply = "vbus",
    284	/* Must match fusb302 dev_name in intel_cht_int33fe.c */
    285	.dev_name = "i2c-fusb302",
    286};
    287
    288static const struct regulator_init_data bq24190_vbus_init_data = {
    289	.constraints = {
    290		/* The name is used in intel_cht_int33fe.c do not change. */
    291		.name = "cht_wc_usb_typec_vbus",
    292		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
    293	},
    294	.consumer_supplies = &fusb302_consumer,
    295	.num_consumer_supplies = 1,
    296};
    297
    298static struct bq24190_platform_data bq24190_pdata = {
    299	.regulator_init_data = &bq24190_vbus_init_data,
    300};
    301
    302static struct i2c_board_info gpd_win_board_info = {
    303	.type = "bq24190",
    304	.addr = 0x6b,
    305	.dev_name = "bq24190",
    306	.swnode = &bq24190_node,
    307	.platform_data = &bq24190_pdata,
    308};
    309
    310/********** Xiaomi Mi Pad 2 charger IC settings  **********/
    311static struct regulator_consumer_supply bq2589x_vbus_consumer = {
    312	.supply = "vbus",
    313	.dev_name = "cht_wcove_pwrsrc",
    314};
    315
    316static const struct regulator_init_data bq2589x_vbus_init_data = {
    317	.constraints = {
    318		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
    319	},
    320	.consumer_supplies = &bq2589x_vbus_consumer,
    321	.num_consumer_supplies = 1,
    322};
    323
    324static struct bq25890_platform_data bq2589x_pdata = {
    325	.regulator_init_data = &bq2589x_vbus_init_data,
    326};
    327
    328static const struct property_entry xiaomi_mipad2_props[] = {
    329	PROPERTY_ENTRY_BOOL("linux,skip-reset"),
    330	PROPERTY_ENTRY_BOOL("linux,read-back-settings"),
    331	{ }
    332};
    333
    334static const struct software_node xiaomi_mipad2_node = {
    335	.properties = xiaomi_mipad2_props,
    336};
    337
    338static struct i2c_board_info xiaomi_mipad2_board_info = {
    339	.type = "bq25890",
    340	.addr = 0x6a,
    341	.dev_name = "bq25890",
    342	.swnode = &xiaomi_mipad2_node,
    343	.platform_data = &bq2589x_pdata,
    344};
    345
    346/********** Lenovo Yogabook YB1-X90F/-X91F/-X91L charger settings **********/
    347static const char * const lenovo_yb1_bq25892_suppliers[] = { "cht_wcove_pwrsrc" };
    348
    349static const struct property_entry lenovo_yb1_bq25892_props[] = {
    350	PROPERTY_ENTRY_STRING_ARRAY("supplied-from",
    351				    lenovo_yb1_bq25892_suppliers),
    352	PROPERTY_ENTRY_U32("linux,pump-express-vbus-max", 12000000),
    353	PROPERTY_ENTRY_BOOL("linux,skip-reset"),
    354	/*
    355	 * The firmware sets everything to the defaults, which leads to a
    356	 * somewhat low charge-current of 2048mA and worse to a battery-voltage
    357	 * of 4.2V instead of 4.35V (when booted without a charger connected).
    358	 * Use our own values instead of "linux,read-back-settings" to fix this.
    359	 */
    360	PROPERTY_ENTRY_U32("ti,charge-current", 4224000),
    361	PROPERTY_ENTRY_U32("ti,battery-regulation-voltage", 4352000),
    362	PROPERTY_ENTRY_U32("ti,termination-current", 256000),
    363	PROPERTY_ENTRY_U32("ti,precharge-current", 128000),
    364	PROPERTY_ENTRY_U32("ti,minimum-sys-voltage", 3500000),
    365	PROPERTY_ENTRY_U32("ti,boost-voltage", 4998000),
    366	PROPERTY_ENTRY_U32("ti,boost-max-current", 1400000),
    367	PROPERTY_ENTRY_BOOL("ti,use-ilim-pin"),
    368	{ }
    369};
    370
    371static const struct software_node lenovo_yb1_bq25892_node = {
    372	.properties = lenovo_yb1_bq25892_props,
    373};
    374
    375static struct i2c_board_info lenovo_yogabook1_board_info = {
    376	.type = "bq25892",
    377	.addr = 0x6b,
    378	.dev_name = "bq25892",
    379	.swnode = &lenovo_yb1_bq25892_node,
    380	.platform_data = &bq2589x_pdata,
    381};
    382
    383static int cht_wc_i2c_adap_i2c_probe(struct platform_device *pdev)
    384{
    385	struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
    386	struct i2c_board_info *board_info = NULL;
    387	struct cht_wc_i2c_adap *adap;
    388	int ret, reg, irq;
    389
    390	irq = platform_get_irq(pdev, 0);
    391	if (irq < 0)
    392		return irq;
    393
    394	adap = devm_kzalloc(&pdev->dev, sizeof(*adap), GFP_KERNEL);
    395	if (!adap)
    396		return -ENOMEM;
    397
    398	init_waitqueue_head(&adap->wait);
    399	mutex_init(&adap->adap_lock);
    400	mutex_init(&adap->irqchip_lock);
    401	adap->irqchip = cht_wc_i2c_irq_chip;
    402	adap->regmap = pmic->regmap;
    403	adap->adapter.owner = THIS_MODULE;
    404	adap->adapter.class = I2C_CLASS_HWMON;
    405	adap->adapter.algo = &cht_wc_i2c_adap_algo;
    406	adap->adapter.lock_ops = &cht_wc_i2c_adap_lock_ops;
    407	strlcpy(adap->adapter.name, "PMIC I2C Adapter",
    408		sizeof(adap->adapter.name));
    409	adap->adapter.dev.parent = &pdev->dev;
    410
    411	/* Clear and activate i2c-adapter interrupts, disable client IRQ */
    412	adap->old_irq_mask = adap->irq_mask = ~CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK;
    413
    414	ret = regmap_read(adap->regmap, CHT_WC_I2C_RDDATA, &reg);
    415	if (ret)
    416		return ret;
    417
    418	ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, ~adap->irq_mask);
    419	if (ret)
    420		return ret;
    421
    422	ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, adap->irq_mask);
    423	if (ret)
    424		return ret;
    425
    426	/* Alloc and register client IRQ */
    427	adap->irq_domain = irq_domain_add_linear(NULL, 1, &irq_domain_simple_ops, NULL);
    428	if (!adap->irq_domain)
    429		return -ENOMEM;
    430
    431	adap->client_irq = irq_create_mapping(adap->irq_domain, 0);
    432	if (!adap->client_irq) {
    433		ret = -ENOMEM;
    434		goto remove_irq_domain;
    435	}
    436
    437	irq_set_chip_data(adap->client_irq, adap);
    438	irq_set_chip_and_handler(adap->client_irq, &adap->irqchip,
    439				 handle_simple_irq);
    440
    441	ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
    442					cht_wc_i2c_adap_thread_handler,
    443					IRQF_ONESHOT, "PMIC I2C Adapter", adap);
    444	if (ret)
    445		goto remove_irq_domain;
    446
    447	i2c_set_adapdata(&adap->adapter, adap);
    448	ret = i2c_add_adapter(&adap->adapter);
    449	if (ret)
    450		goto remove_irq_domain;
    451
    452	switch (pmic->cht_wc_model) {
    453	case INTEL_CHT_WC_GPD_WIN_POCKET:
    454		board_info = &gpd_win_board_info;
    455		break;
    456	case INTEL_CHT_WC_XIAOMI_MIPAD2:
    457		board_info = &xiaomi_mipad2_board_info;
    458		break;
    459	case INTEL_CHT_WC_LENOVO_YOGABOOK1:
    460		board_info = &lenovo_yogabook1_board_info;
    461		break;
    462	default:
    463		dev_warn(&pdev->dev, "Unknown model, not instantiating charger device\n");
    464		break;
    465	}
    466
    467	if (board_info) {
    468		board_info->irq = adap->client_irq;
    469		adap->client = i2c_new_client_device(&adap->adapter, board_info);
    470		if (IS_ERR(adap->client)) {
    471			ret = PTR_ERR(adap->client);
    472			goto del_adapter;
    473		}
    474	}
    475
    476	platform_set_drvdata(pdev, adap);
    477	return 0;
    478
    479del_adapter:
    480	i2c_del_adapter(&adap->adapter);
    481remove_irq_domain:
    482	irq_domain_remove(adap->irq_domain);
    483	return ret;
    484}
    485
    486static int cht_wc_i2c_adap_i2c_remove(struct platform_device *pdev)
    487{
    488	struct cht_wc_i2c_adap *adap = platform_get_drvdata(pdev);
    489
    490	i2c_unregister_device(adap->client);
    491	i2c_del_adapter(&adap->adapter);
    492	irq_domain_remove(adap->irq_domain);
    493
    494	return 0;
    495}
    496
    497static const struct platform_device_id cht_wc_i2c_adap_id_table[] = {
    498	{ .name = "cht_wcove_ext_chgr" },
    499	{},
    500};
    501MODULE_DEVICE_TABLE(platform, cht_wc_i2c_adap_id_table);
    502
    503static struct platform_driver cht_wc_i2c_adap_driver = {
    504	.probe = cht_wc_i2c_adap_i2c_probe,
    505	.remove = cht_wc_i2c_adap_i2c_remove,
    506	.driver = {
    507		.name = "cht_wcove_ext_chgr",
    508	},
    509	.id_table = cht_wc_i2c_adap_id_table,
    510};
    511module_platform_driver(cht_wc_i2c_adap_driver);
    512
    513MODULE_DESCRIPTION("Intel CHT Whiskey Cove PMIC I2C Master driver");
    514MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
    515MODULE_LICENSE("GPL");