cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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ad799x.c (23083B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * iio/adc/ad799x.c
      4 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
      5 *
      6 * based on iio/adc/max1363
      7 * Copyright (C) 2008-2010 Jonathan Cameron
      8 *
      9 * based on linux/drivers/i2c/chips/max123x
     10 * Copyright (C) 2002-2004 Stefan Eletzhofer
     11 *
     12 * based on linux/drivers/acron/char/pcf8583.c
     13 * Copyright (C) 2000 Russell King
     14 *
     15 * ad799x.c
     16 *
     17 * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
     18 * ad7998 and similar chips.
     19 */
     20
     21#include <linux/interrupt.h>
     22#include <linux/device.h>
     23#include <linux/kernel.h>
     24#include <linux/sysfs.h>
     25#include <linux/i2c.h>
     26#include <linux/regulator/consumer.h>
     27#include <linux/slab.h>
     28#include <linux/types.h>
     29#include <linux/err.h>
     30#include <linux/module.h>
     31#include <linux/bitops.h>
     32
     33#include <linux/iio/iio.h>
     34#include <linux/iio/sysfs.h>
     35#include <linux/iio/events.h>
     36#include <linux/iio/buffer.h>
     37#include <linux/iio/trigger_consumer.h>
     38#include <linux/iio/triggered_buffer.h>
     39
     40#define AD799X_CHANNEL_SHIFT			4
     41
     42/*
     43 * AD7991, AD7995 and AD7999 defines
     44 */
     45
     46#define AD7991_REF_SEL				0x08
     47#define AD7991_FLTR				0x04
     48#define AD7991_BIT_TRIAL_DELAY			0x02
     49#define AD7991_SAMPLE_DELAY			0x01
     50
     51/*
     52 * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
     53 */
     54
     55#define AD7998_FLTR				BIT(3)
     56#define AD7998_ALERT_EN				BIT(2)
     57#define AD7998_BUSY_ALERT			BIT(1)
     58#define AD7998_BUSY_ALERT_POL			BIT(0)
     59
     60#define AD7998_CONV_RES_REG			0x0
     61#define AD7998_ALERT_STAT_REG			0x1
     62#define AD7998_CONF_REG				0x2
     63#define AD7998_CYCLE_TMR_REG			0x3
     64
     65#define AD7998_DATALOW_REG(x)			((x) * 3 + 0x4)
     66#define AD7998_DATAHIGH_REG(x)			((x) * 3 + 0x5)
     67#define AD7998_HYST_REG(x)			((x) * 3 + 0x6)
     68
     69#define AD7998_CYC_MASK				GENMASK(2, 0)
     70#define AD7998_CYC_DIS				0x0
     71#define AD7998_CYC_TCONF_32			0x1
     72#define AD7998_CYC_TCONF_64			0x2
     73#define AD7998_CYC_TCONF_128			0x3
     74#define AD7998_CYC_TCONF_256			0x4
     75#define AD7998_CYC_TCONF_512			0x5
     76#define AD7998_CYC_TCONF_1024			0x6
     77#define AD7998_CYC_TCONF_2048			0x7
     78
     79#define AD7998_ALERT_STAT_CLEAR			0xFF
     80
     81/*
     82 * AD7997 and AD7997 defines
     83 */
     84
     85#define AD7997_8_READ_SINGLE			BIT(7)
     86#define AD7997_8_READ_SEQUENCE			(BIT(6) | BIT(5) | BIT(4))
     87
     88enum {
     89	ad7991,
     90	ad7995,
     91	ad7999,
     92	ad7992,
     93	ad7993,
     94	ad7994,
     95	ad7997,
     96	ad7998
     97};
     98
     99/**
    100 * struct ad799x_chip_config - chip specific information
    101 * @channel:		channel specification
    102 * @default_config:	device default configuration
    103 * @info:		pointer to iio_info struct
    104 */
    105struct ad799x_chip_config {
    106	const struct iio_chan_spec	channel[9];
    107	u16				default_config;
    108	const struct iio_info		*info;
    109};
    110
    111/**
    112 * struct ad799x_chip_info - chip specific information
    113 * @num_channels:	number of channels
    114 * @noirq_config:	device configuration w/o IRQ
    115 * @irq_config:		device configuration w/IRQ
    116 */
    117struct ad799x_chip_info {
    118	int				num_channels;
    119	const struct ad799x_chip_config	noirq_config;
    120	const struct ad799x_chip_config	irq_config;
    121};
    122
    123struct ad799x_state {
    124	struct i2c_client		*client;
    125	const struct ad799x_chip_config	*chip_config;
    126	struct regulator		*reg;
    127	struct regulator		*vref;
    128	unsigned			id;
    129	u16				config;
    130
    131	u8				*rx_buf;
    132	unsigned int			transfer_size;
    133};
    134
    135static int ad799x_write_config(struct ad799x_state *st, u16 val)
    136{
    137	switch (st->id) {
    138	case ad7997:
    139	case ad7998:
    140		return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
    141			val);
    142	case ad7992:
    143	case ad7993:
    144	case ad7994:
    145		return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
    146			val);
    147	default:
    148		/* Will be written when doing a conversion */
    149		st->config = val;
    150		return 0;
    151	}
    152}
    153
    154static int ad799x_read_config(struct ad799x_state *st)
    155{
    156	switch (st->id) {
    157	case ad7997:
    158	case ad7998:
    159		return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
    160	case ad7992:
    161	case ad7993:
    162	case ad7994:
    163		return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
    164	default:
    165		/* No readback support */
    166		return st->config;
    167	}
    168}
    169
    170static int ad799x_update_config(struct ad799x_state *st, u16 config)
    171{
    172	int ret;
    173
    174	ret = ad799x_write_config(st, config);
    175	if (ret < 0)
    176		return ret;
    177	ret = ad799x_read_config(st);
    178	if (ret < 0)
    179		return ret;
    180	st->config = ret;
    181
    182	return 0;
    183}
    184
    185static irqreturn_t ad799x_trigger_handler(int irq, void *p)
    186{
    187	struct iio_poll_func *pf = p;
    188	struct iio_dev *indio_dev = pf->indio_dev;
    189	struct ad799x_state *st = iio_priv(indio_dev);
    190	int b_sent;
    191	u8 cmd;
    192
    193	switch (st->id) {
    194	case ad7991:
    195	case ad7995:
    196	case ad7999:
    197		cmd = st->config |
    198			(*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
    199		break;
    200	case ad7992:
    201	case ad7993:
    202	case ad7994:
    203		cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
    204			AD7998_CONV_RES_REG;
    205		break;
    206	case ad7997:
    207	case ad7998:
    208		cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
    209		break;
    210	default:
    211		cmd = 0;
    212	}
    213
    214	b_sent = i2c_smbus_read_i2c_block_data(st->client,
    215			cmd, st->transfer_size, st->rx_buf);
    216	if (b_sent < 0)
    217		goto out;
    218
    219	iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
    220			iio_get_time_ns(indio_dev));
    221out:
    222	iio_trigger_notify_done(indio_dev->trig);
    223
    224	return IRQ_HANDLED;
    225}
    226
    227static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
    228	const unsigned long *scan_mask)
    229{
    230	struct ad799x_state *st = iio_priv(indio_dev);
    231
    232	kfree(st->rx_buf);
    233	st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
    234	if (!st->rx_buf)
    235		return -ENOMEM;
    236
    237	st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
    238
    239	switch (st->id) {
    240	case ad7992:
    241	case ad7993:
    242	case ad7994:
    243	case ad7997:
    244	case ad7998:
    245		st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
    246		st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
    247		return ad799x_write_config(st, st->config);
    248	default:
    249		return 0;
    250	}
    251}
    252
    253static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
    254{
    255	u8 cmd;
    256
    257	switch (st->id) {
    258	case ad7991:
    259	case ad7995:
    260	case ad7999:
    261		cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
    262		break;
    263	case ad7992:
    264	case ad7993:
    265	case ad7994:
    266		cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
    267		break;
    268	case ad7997:
    269	case ad7998:
    270		cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
    271		break;
    272	default:
    273		return -EINVAL;
    274	}
    275
    276	return i2c_smbus_read_word_swapped(st->client, cmd);
    277}
    278
    279static int ad799x_read_raw(struct iio_dev *indio_dev,
    280			   struct iio_chan_spec const *chan,
    281			   int *val,
    282			   int *val2,
    283			   long m)
    284{
    285	int ret;
    286	struct ad799x_state *st = iio_priv(indio_dev);
    287
    288	switch (m) {
    289	case IIO_CHAN_INFO_RAW:
    290		ret = iio_device_claim_direct_mode(indio_dev);
    291		if (ret)
    292			return ret;
    293		ret = ad799x_scan_direct(st, chan->scan_index);
    294		iio_device_release_direct_mode(indio_dev);
    295
    296		if (ret < 0)
    297			return ret;
    298		*val = (ret >> chan->scan_type.shift) &
    299			GENMASK(chan->scan_type.realbits - 1, 0);
    300		return IIO_VAL_INT;
    301	case IIO_CHAN_INFO_SCALE:
    302		if (st->vref)
    303			ret = regulator_get_voltage(st->vref);
    304		else
    305			ret = regulator_get_voltage(st->reg);
    306
    307		if (ret < 0)
    308			return ret;
    309		*val = ret / 1000;
    310		*val2 = chan->scan_type.realbits;
    311		return IIO_VAL_FRACTIONAL_LOG2;
    312	}
    313	return -EINVAL;
    314}
    315static const unsigned int ad7998_frequencies[] = {
    316	[AD7998_CYC_DIS]	= 0,
    317	[AD7998_CYC_TCONF_32]	= 15625,
    318	[AD7998_CYC_TCONF_64]	= 7812,
    319	[AD7998_CYC_TCONF_128]	= 3906,
    320	[AD7998_CYC_TCONF_512]	= 976,
    321	[AD7998_CYC_TCONF_1024]	= 488,
    322	[AD7998_CYC_TCONF_2048]	= 244,
    323};
    324
    325static ssize_t ad799x_read_frequency(struct device *dev,
    326					struct device_attribute *attr,
    327					char *buf)
    328{
    329	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
    330	struct ad799x_state *st = iio_priv(indio_dev);
    331
    332	int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
    333	if (ret < 0)
    334		return ret;
    335
    336	return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
    337}
    338
    339static ssize_t ad799x_write_frequency(struct device *dev,
    340					 struct device_attribute *attr,
    341					 const char *buf,
    342					 size_t len)
    343{
    344	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
    345	struct ad799x_state *st = iio_priv(indio_dev);
    346
    347	long val;
    348	int ret, i;
    349
    350	ret = kstrtol(buf, 10, &val);
    351	if (ret)
    352		return ret;
    353
    354	mutex_lock(&indio_dev->mlock);
    355	ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
    356	if (ret < 0)
    357		goto error_ret_mutex;
    358	/* Wipe the bits clean */
    359	ret &= ~AD7998_CYC_MASK;
    360
    361	for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
    362		if (val == ad7998_frequencies[i])
    363			break;
    364	if (i == ARRAY_SIZE(ad7998_frequencies)) {
    365		ret = -EINVAL;
    366		goto error_ret_mutex;
    367	}
    368
    369	ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
    370		ret | i);
    371	if (ret < 0)
    372		goto error_ret_mutex;
    373	ret = len;
    374
    375error_ret_mutex:
    376	mutex_unlock(&indio_dev->mlock);
    377
    378	return ret;
    379}
    380
    381static int ad799x_read_event_config(struct iio_dev *indio_dev,
    382				    const struct iio_chan_spec *chan,
    383				    enum iio_event_type type,
    384				    enum iio_event_direction dir)
    385{
    386	struct ad799x_state *st = iio_priv(indio_dev);
    387
    388	if (!(st->config & AD7998_ALERT_EN))
    389		return 0;
    390
    391	if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
    392		return 1;
    393
    394	return 0;
    395}
    396
    397static int ad799x_write_event_config(struct iio_dev *indio_dev,
    398				     const struct iio_chan_spec *chan,
    399				     enum iio_event_type type,
    400				     enum iio_event_direction dir,
    401				     int state)
    402{
    403	struct ad799x_state *st = iio_priv(indio_dev);
    404	int ret;
    405
    406	ret = iio_device_claim_direct_mode(indio_dev);
    407	if (ret)
    408		return ret;
    409
    410	if (state)
    411		st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
    412	else
    413		st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
    414
    415	if (st->config >> AD799X_CHANNEL_SHIFT)
    416		st->config |= AD7998_ALERT_EN;
    417	else
    418		st->config &= ~AD7998_ALERT_EN;
    419
    420	ret = ad799x_write_config(st, st->config);
    421	iio_device_release_direct_mode(indio_dev);
    422	return ret;
    423}
    424
    425static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
    426					 enum iio_event_direction dir,
    427					 enum iio_event_info info)
    428{
    429	switch (info) {
    430	case IIO_EV_INFO_VALUE:
    431		if (dir == IIO_EV_DIR_FALLING)
    432			return AD7998_DATALOW_REG(chan->channel);
    433		else
    434			return AD7998_DATAHIGH_REG(chan->channel);
    435	case IIO_EV_INFO_HYSTERESIS:
    436		return AD7998_HYST_REG(chan->channel);
    437	default:
    438		return -EINVAL;
    439	}
    440
    441	return 0;
    442}
    443
    444static int ad799x_write_event_value(struct iio_dev *indio_dev,
    445				    const struct iio_chan_spec *chan,
    446				    enum iio_event_type type,
    447				    enum iio_event_direction dir,
    448				    enum iio_event_info info,
    449				    int val, int val2)
    450{
    451	int ret;
    452	struct ad799x_state *st = iio_priv(indio_dev);
    453
    454	if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
    455		return -EINVAL;
    456
    457	mutex_lock(&indio_dev->mlock);
    458	ret = i2c_smbus_write_word_swapped(st->client,
    459		ad799x_threshold_reg(chan, dir, info),
    460		val << chan->scan_type.shift);
    461	mutex_unlock(&indio_dev->mlock);
    462
    463	return ret;
    464}
    465
    466static int ad799x_read_event_value(struct iio_dev *indio_dev,
    467				    const struct iio_chan_spec *chan,
    468				    enum iio_event_type type,
    469				    enum iio_event_direction dir,
    470				    enum iio_event_info info,
    471				    int *val, int *val2)
    472{
    473	int ret;
    474	struct ad799x_state *st = iio_priv(indio_dev);
    475
    476	mutex_lock(&indio_dev->mlock);
    477	ret = i2c_smbus_read_word_swapped(st->client,
    478		ad799x_threshold_reg(chan, dir, info));
    479	mutex_unlock(&indio_dev->mlock);
    480	if (ret < 0)
    481		return ret;
    482	*val = (ret >> chan->scan_type.shift) &
    483		GENMASK(chan->scan_type.realbits - 1, 0);
    484
    485	return IIO_VAL_INT;
    486}
    487
    488static irqreturn_t ad799x_event_handler(int irq, void *private)
    489{
    490	struct iio_dev *indio_dev = private;
    491	struct ad799x_state *st = iio_priv(private);
    492	int i, ret;
    493
    494	ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
    495	if (ret <= 0)
    496		goto done;
    497
    498	if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
    499		AD7998_ALERT_STAT_CLEAR) < 0)
    500		goto done;
    501
    502	for (i = 0; i < 8; i++) {
    503		if (ret & BIT(i))
    504			iio_push_event(indio_dev,
    505				       i & 0x1 ?
    506				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
    507							    (i >> 1),
    508							    IIO_EV_TYPE_THRESH,
    509							    IIO_EV_DIR_RISING) :
    510				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
    511							    (i >> 1),
    512							    IIO_EV_TYPE_THRESH,
    513							    IIO_EV_DIR_FALLING),
    514				       iio_get_time_ns(indio_dev));
    515	}
    516
    517done:
    518	return IRQ_HANDLED;
    519}
    520
    521static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
    522			      ad799x_read_frequency,
    523			      ad799x_write_frequency);
    524static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
    525
    526static struct attribute *ad799x_event_attributes[] = {
    527	&iio_dev_attr_sampling_frequency.dev_attr.attr,
    528	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
    529	NULL,
    530};
    531
    532static const struct attribute_group ad799x_event_attrs_group = {
    533	.attrs = ad799x_event_attributes,
    534};
    535
    536static const struct iio_info ad7991_info = {
    537	.read_raw = &ad799x_read_raw,
    538	.update_scan_mode = ad799x_update_scan_mode,
    539};
    540
    541static const struct iio_info ad7993_4_7_8_noirq_info = {
    542	.read_raw = &ad799x_read_raw,
    543	.update_scan_mode = ad799x_update_scan_mode,
    544};
    545
    546static const struct iio_info ad7993_4_7_8_irq_info = {
    547	.read_raw = &ad799x_read_raw,
    548	.event_attrs = &ad799x_event_attrs_group,
    549	.read_event_config = &ad799x_read_event_config,
    550	.write_event_config = &ad799x_write_event_config,
    551	.read_event_value = &ad799x_read_event_value,
    552	.write_event_value = &ad799x_write_event_value,
    553	.update_scan_mode = ad799x_update_scan_mode,
    554};
    555
    556static const struct iio_event_spec ad799x_events[] = {
    557	{
    558		.type = IIO_EV_TYPE_THRESH,
    559		.dir = IIO_EV_DIR_RISING,
    560		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
    561			BIT(IIO_EV_INFO_ENABLE),
    562	}, {
    563		.type = IIO_EV_TYPE_THRESH,
    564		.dir = IIO_EV_DIR_FALLING,
    565		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
    566			BIT(IIO_EV_INFO_ENABLE),
    567	}, {
    568		.type = IIO_EV_TYPE_THRESH,
    569		.dir = IIO_EV_DIR_EITHER,
    570		.mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
    571	},
    572};
    573
    574#define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
    575	.type = IIO_VOLTAGE, \
    576	.indexed = 1, \
    577	.channel = (_index), \
    578	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
    579	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
    580	.scan_index = (_index), \
    581	.scan_type = { \
    582		.sign = 'u', \
    583		.realbits = (_realbits), \
    584		.storagebits = 16, \
    585		.shift = 12 - (_realbits), \
    586		.endianness = IIO_BE, \
    587	}, \
    588	.event_spec = _ev_spec, \
    589	.num_event_specs = _num_ev_spec, \
    590}
    591
    592#define AD799X_CHANNEL(_index, _realbits) \
    593	_AD799X_CHANNEL(_index, _realbits, NULL, 0)
    594
    595#define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
    596	_AD799X_CHANNEL(_index, _realbits, ad799x_events, \
    597		ARRAY_SIZE(ad799x_events))
    598
    599static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
    600	[ad7991] = {
    601		.num_channels = 5,
    602		.noirq_config = {
    603			.channel = {
    604				AD799X_CHANNEL(0, 12),
    605				AD799X_CHANNEL(1, 12),
    606				AD799X_CHANNEL(2, 12),
    607				AD799X_CHANNEL(3, 12),
    608				IIO_CHAN_SOFT_TIMESTAMP(4),
    609			},
    610			.info = &ad7991_info,
    611		},
    612	},
    613	[ad7995] = {
    614		.num_channels = 5,
    615		.noirq_config = {
    616			.channel = {
    617				AD799X_CHANNEL(0, 10),
    618				AD799X_CHANNEL(1, 10),
    619				AD799X_CHANNEL(2, 10),
    620				AD799X_CHANNEL(3, 10),
    621				IIO_CHAN_SOFT_TIMESTAMP(4),
    622			},
    623			.info = &ad7991_info,
    624		},
    625	},
    626	[ad7999] = {
    627		.num_channels = 5,
    628		.noirq_config = {
    629			.channel = {
    630				AD799X_CHANNEL(0, 8),
    631				AD799X_CHANNEL(1, 8),
    632				AD799X_CHANNEL(2, 8),
    633				AD799X_CHANNEL(3, 8),
    634				IIO_CHAN_SOFT_TIMESTAMP(4),
    635			},
    636			.info = &ad7991_info,
    637		},
    638	},
    639	[ad7992] = {
    640		.num_channels = 3,
    641		.noirq_config = {
    642			.channel = {
    643				AD799X_CHANNEL(0, 12),
    644				AD799X_CHANNEL(1, 12),
    645				IIO_CHAN_SOFT_TIMESTAMP(3),
    646			},
    647			.info = &ad7993_4_7_8_noirq_info,
    648		},
    649		.irq_config = {
    650			.channel = {
    651				AD799X_CHANNEL_WITH_EVENTS(0, 12),
    652				AD799X_CHANNEL_WITH_EVENTS(1, 12),
    653				IIO_CHAN_SOFT_TIMESTAMP(3),
    654			},
    655			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
    656			.info = &ad7993_4_7_8_irq_info,
    657		},
    658	},
    659	[ad7993] = {
    660		.num_channels = 5,
    661		.noirq_config = {
    662			.channel = {
    663				AD799X_CHANNEL(0, 10),
    664				AD799X_CHANNEL(1, 10),
    665				AD799X_CHANNEL(2, 10),
    666				AD799X_CHANNEL(3, 10),
    667				IIO_CHAN_SOFT_TIMESTAMP(4),
    668			},
    669			.info = &ad7993_4_7_8_noirq_info,
    670		},
    671		.irq_config = {
    672			.channel = {
    673				AD799X_CHANNEL_WITH_EVENTS(0, 10),
    674				AD799X_CHANNEL_WITH_EVENTS(1, 10),
    675				AD799X_CHANNEL_WITH_EVENTS(2, 10),
    676				AD799X_CHANNEL_WITH_EVENTS(3, 10),
    677				IIO_CHAN_SOFT_TIMESTAMP(4),
    678			},
    679			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
    680			.info = &ad7993_4_7_8_irq_info,
    681		},
    682	},
    683	[ad7994] = {
    684		.num_channels = 5,
    685		.noirq_config = {
    686			.channel = {
    687				AD799X_CHANNEL(0, 12),
    688				AD799X_CHANNEL(1, 12),
    689				AD799X_CHANNEL(2, 12),
    690				AD799X_CHANNEL(3, 12),
    691				IIO_CHAN_SOFT_TIMESTAMP(4),
    692			},
    693			.info = &ad7993_4_7_8_noirq_info,
    694		},
    695		.irq_config = {
    696			.channel = {
    697				AD799X_CHANNEL_WITH_EVENTS(0, 12),
    698				AD799X_CHANNEL_WITH_EVENTS(1, 12),
    699				AD799X_CHANNEL_WITH_EVENTS(2, 12),
    700				AD799X_CHANNEL_WITH_EVENTS(3, 12),
    701				IIO_CHAN_SOFT_TIMESTAMP(4),
    702			},
    703			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
    704			.info = &ad7993_4_7_8_irq_info,
    705		},
    706	},
    707	[ad7997] = {
    708		.num_channels = 9,
    709		.noirq_config = {
    710			.channel = {
    711				AD799X_CHANNEL(0, 10),
    712				AD799X_CHANNEL(1, 10),
    713				AD799X_CHANNEL(2, 10),
    714				AD799X_CHANNEL(3, 10),
    715				AD799X_CHANNEL(4, 10),
    716				AD799X_CHANNEL(5, 10),
    717				AD799X_CHANNEL(6, 10),
    718				AD799X_CHANNEL(7, 10),
    719				IIO_CHAN_SOFT_TIMESTAMP(8),
    720			},
    721			.info = &ad7993_4_7_8_noirq_info,
    722		},
    723		.irq_config = {
    724			.channel = {
    725				AD799X_CHANNEL_WITH_EVENTS(0, 10),
    726				AD799X_CHANNEL_WITH_EVENTS(1, 10),
    727				AD799X_CHANNEL_WITH_EVENTS(2, 10),
    728				AD799X_CHANNEL_WITH_EVENTS(3, 10),
    729				AD799X_CHANNEL(4, 10),
    730				AD799X_CHANNEL(5, 10),
    731				AD799X_CHANNEL(6, 10),
    732				AD799X_CHANNEL(7, 10),
    733				IIO_CHAN_SOFT_TIMESTAMP(8),
    734			},
    735			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
    736			.info = &ad7993_4_7_8_irq_info,
    737		},
    738	},
    739	[ad7998] = {
    740		.num_channels = 9,
    741		.noirq_config = {
    742			.channel = {
    743				AD799X_CHANNEL(0, 12),
    744				AD799X_CHANNEL(1, 12),
    745				AD799X_CHANNEL(2, 12),
    746				AD799X_CHANNEL(3, 12),
    747				AD799X_CHANNEL(4, 12),
    748				AD799X_CHANNEL(5, 12),
    749				AD799X_CHANNEL(6, 12),
    750				AD799X_CHANNEL(7, 12),
    751				IIO_CHAN_SOFT_TIMESTAMP(8),
    752			},
    753			.info = &ad7993_4_7_8_noirq_info,
    754		},
    755		.irq_config = {
    756			.channel = {
    757				AD799X_CHANNEL_WITH_EVENTS(0, 12),
    758				AD799X_CHANNEL_WITH_EVENTS(1, 12),
    759				AD799X_CHANNEL_WITH_EVENTS(2, 12),
    760				AD799X_CHANNEL_WITH_EVENTS(3, 12),
    761				AD799X_CHANNEL(4, 12),
    762				AD799X_CHANNEL(5, 12),
    763				AD799X_CHANNEL(6, 12),
    764				AD799X_CHANNEL(7, 12),
    765				IIO_CHAN_SOFT_TIMESTAMP(8),
    766			},
    767			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
    768			.info = &ad7993_4_7_8_irq_info,
    769		},
    770	},
    771};
    772
    773static int ad799x_probe(struct i2c_client *client,
    774				   const struct i2c_device_id *id)
    775{
    776	int ret;
    777	int extra_config = 0;
    778	struct ad799x_state *st;
    779	struct iio_dev *indio_dev;
    780	const struct ad799x_chip_info *chip_info =
    781		&ad799x_chip_info_tbl[id->driver_data];
    782
    783	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
    784	if (indio_dev == NULL)
    785		return -ENOMEM;
    786
    787	st = iio_priv(indio_dev);
    788	/* this is only used for device removal purposes */
    789	i2c_set_clientdata(client, indio_dev);
    790
    791	st->id = id->driver_data;
    792	if (client->irq > 0 && chip_info->irq_config.info)
    793		st->chip_config = &chip_info->irq_config;
    794	else
    795		st->chip_config = &chip_info->noirq_config;
    796
    797	/* TODO: Add pdata options for filtering and bit delay */
    798
    799	st->reg = devm_regulator_get(&client->dev, "vcc");
    800	if (IS_ERR(st->reg))
    801		return PTR_ERR(st->reg);
    802	ret = regulator_enable(st->reg);
    803	if (ret)
    804		return ret;
    805
    806	/* check if an external reference is supplied */
    807	st->vref = devm_regulator_get_optional(&client->dev, "vref");
    808
    809	if (IS_ERR(st->vref)) {
    810		if (PTR_ERR(st->vref) == -ENODEV) {
    811			st->vref = NULL;
    812			dev_info(&client->dev, "Using VCC reference voltage\n");
    813		} else {
    814			ret = PTR_ERR(st->vref);
    815			goto error_disable_reg;
    816		}
    817	}
    818
    819	if (st->vref) {
    820		/*
    821		 * Use external reference voltage if supported by hardware.
    822		 * This is optional if voltage / regulator present, use VCC otherwise.
    823		 */
    824		if ((st->id == ad7991) || (st->id == ad7995) || (st->id == ad7999)) {
    825			dev_info(&client->dev, "Using external reference voltage\n");
    826			extra_config |= AD7991_REF_SEL;
    827			ret = regulator_enable(st->vref);
    828			if (ret)
    829				goto error_disable_reg;
    830		} else {
    831			st->vref = NULL;
    832			dev_warn(&client->dev, "Supplied reference not supported\n");
    833		}
    834	}
    835
    836	st->client = client;
    837
    838	indio_dev->name = id->name;
    839	indio_dev->info = st->chip_config->info;
    840
    841	indio_dev->modes = INDIO_DIRECT_MODE;
    842	indio_dev->channels = st->chip_config->channel;
    843	indio_dev->num_channels = chip_info->num_channels;
    844
    845	ret = ad799x_update_config(st, st->chip_config->default_config | extra_config);
    846	if (ret)
    847		goto error_disable_vref;
    848
    849	ret = iio_triggered_buffer_setup(indio_dev, NULL,
    850		&ad799x_trigger_handler, NULL);
    851	if (ret)
    852		goto error_disable_vref;
    853
    854	if (client->irq > 0) {
    855		ret = devm_request_threaded_irq(&client->dev,
    856						client->irq,
    857						NULL,
    858						ad799x_event_handler,
    859						IRQF_TRIGGER_FALLING |
    860						IRQF_ONESHOT,
    861						client->name,
    862						indio_dev);
    863		if (ret)
    864			goto error_cleanup_ring;
    865	}
    866	ret = iio_device_register(indio_dev);
    867	if (ret)
    868		goto error_cleanup_ring;
    869
    870	return 0;
    871
    872error_cleanup_ring:
    873	iio_triggered_buffer_cleanup(indio_dev);
    874error_disable_vref:
    875	if (st->vref)
    876		regulator_disable(st->vref);
    877error_disable_reg:
    878	regulator_disable(st->reg);
    879
    880	return ret;
    881}
    882
    883static int ad799x_remove(struct i2c_client *client)
    884{
    885	struct iio_dev *indio_dev = i2c_get_clientdata(client);
    886	struct ad799x_state *st = iio_priv(indio_dev);
    887
    888	iio_device_unregister(indio_dev);
    889
    890	iio_triggered_buffer_cleanup(indio_dev);
    891	if (st->vref)
    892		regulator_disable(st->vref);
    893	regulator_disable(st->reg);
    894	kfree(st->rx_buf);
    895
    896	return 0;
    897}
    898
    899static int __maybe_unused ad799x_suspend(struct device *dev)
    900{
    901	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
    902	struct ad799x_state *st = iio_priv(indio_dev);
    903
    904	if (st->vref)
    905		regulator_disable(st->vref);
    906	regulator_disable(st->reg);
    907
    908	return 0;
    909}
    910
    911static int __maybe_unused ad799x_resume(struct device *dev)
    912{
    913	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
    914	struct ad799x_state *st = iio_priv(indio_dev);
    915	int ret;
    916
    917	ret = regulator_enable(st->reg);
    918	if (ret) {
    919		dev_err(dev, "Unable to enable vcc regulator\n");
    920		return ret;
    921	}
    922
    923	if (st->vref) {
    924		ret = regulator_enable(st->vref);
    925		if (ret) {
    926			regulator_disable(st->reg);
    927			dev_err(dev, "Unable to enable vref regulator\n");
    928			return ret;
    929		}
    930	}
    931
    932	/* resync config */
    933	ret = ad799x_update_config(st, st->config);
    934	if (ret) {
    935		if (st->vref)
    936			regulator_disable(st->vref);
    937		regulator_disable(st->reg);
    938		return ret;
    939	}
    940
    941	return 0;
    942}
    943
    944static SIMPLE_DEV_PM_OPS(ad799x_pm_ops, ad799x_suspend, ad799x_resume);
    945
    946static const struct i2c_device_id ad799x_id[] = {
    947	{ "ad7991", ad7991 },
    948	{ "ad7995", ad7995 },
    949	{ "ad7999", ad7999 },
    950	{ "ad7992", ad7992 },
    951	{ "ad7993", ad7993 },
    952	{ "ad7994", ad7994 },
    953	{ "ad7997", ad7997 },
    954	{ "ad7998", ad7998 },
    955	{}
    956};
    957
    958MODULE_DEVICE_TABLE(i2c, ad799x_id);
    959
    960static struct i2c_driver ad799x_driver = {
    961	.driver = {
    962		.name = "ad799x",
    963		.pm = &ad799x_pm_ops,
    964	},
    965	.probe = ad799x_probe,
    966	.remove = ad799x_remove,
    967	.id_table = ad799x_id,
    968};
    969module_i2c_driver(ad799x_driver);
    970
    971MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
    972MODULE_DESCRIPTION("Analog Devices AD799x ADC");
    973MODULE_LICENSE("GPL v2");