cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ti-adc081c.c (5873B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * TI ADC081C/ADC101C/ADC121C 8/10/12-bit ADC driver
      4 *
      5 * Copyright (C) 2012 Avionic Design GmbH
      6 * Copyright (C) 2016 Intel
      7 *
      8 * Datasheets:
      9 *	https://www.ti.com/lit/ds/symlink/adc081c021.pdf
     10 *	https://www.ti.com/lit/ds/symlink/adc101c021.pdf
     11 *	https://www.ti.com/lit/ds/symlink/adc121c021.pdf
     12 *
     13 * The devices have a very similar interface and differ mostly in the number of
     14 * bits handled. For the 8-bit and 10-bit models the least-significant 4 or 2
     15 * bits of value registers are reserved.
     16 */
     17
     18#include <linux/err.h>
     19#include <linux/i2c.h>
     20#include <linux/module.h>
     21#include <linux/mod_devicetable.h>
     22#include <linux/property.h>
     23
     24#include <linux/iio/iio.h>
     25#include <linux/iio/buffer.h>
     26#include <linux/iio/trigger_consumer.h>
     27#include <linux/iio/triggered_buffer.h>
     28#include <linux/regulator/consumer.h>
     29
     30struct adc081c {
     31	struct i2c_client *i2c;
     32	struct regulator *ref;
     33
     34	/* 8, 10 or 12 */
     35	int bits;
     36
     37	/* Ensure natural alignment of buffer elements */
     38	struct {
     39		u16 channel;
     40		s64 ts __aligned(8);
     41	} scan;
     42};
     43
     44#define REG_CONV_RES 0x00
     45
     46static int adc081c_read_raw(struct iio_dev *iio,
     47			    struct iio_chan_spec const *channel, int *value,
     48			    int *shift, long mask)
     49{
     50	struct adc081c *adc = iio_priv(iio);
     51	int err;
     52
     53	switch (mask) {
     54	case IIO_CHAN_INFO_RAW:
     55		err = i2c_smbus_read_word_swapped(adc->i2c, REG_CONV_RES);
     56		if (err < 0)
     57			return err;
     58
     59		*value = (err & 0xFFF) >> (12 - adc->bits);
     60		return IIO_VAL_INT;
     61
     62	case IIO_CHAN_INFO_SCALE:
     63		err = regulator_get_voltage(adc->ref);
     64		if (err < 0)
     65			return err;
     66
     67		*value = err / 1000;
     68		*shift = adc->bits;
     69
     70		return IIO_VAL_FRACTIONAL_LOG2;
     71
     72	default:
     73		break;
     74	}
     75
     76	return -EINVAL;
     77}
     78
     79#define ADCxx1C_CHAN(_bits) {					\
     80	.type = IIO_VOLTAGE,					\
     81	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
     82	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
     83	.scan_type = {						\
     84		.sign = 'u',					\
     85		.realbits = (_bits),				\
     86		.storagebits = 16,				\
     87		.shift = 12 - (_bits),				\
     88		.endianness = IIO_CPU,				\
     89	},							\
     90}
     91
     92#define DEFINE_ADCxx1C_CHANNELS(_name, _bits)				\
     93	static const struct iio_chan_spec _name ## _channels[] = {	\
     94		ADCxx1C_CHAN((_bits)),					\
     95		IIO_CHAN_SOFT_TIMESTAMP(1),				\
     96	};								\
     97
     98#define ADC081C_NUM_CHANNELS 2
     99
    100struct adcxx1c_model {
    101	const struct iio_chan_spec* channels;
    102	int bits;
    103};
    104
    105#define ADCxx1C_MODEL(_name, _bits)					\
    106	{								\
    107		.channels = _name ## _channels,				\
    108		.bits = (_bits),					\
    109	}
    110
    111DEFINE_ADCxx1C_CHANNELS(adc081c,  8);
    112DEFINE_ADCxx1C_CHANNELS(adc101c, 10);
    113DEFINE_ADCxx1C_CHANNELS(adc121c, 12);
    114
    115/* Model ids are indexes in _models array */
    116enum adcxx1c_model_id {
    117	ADC081C = 0,
    118	ADC101C = 1,
    119	ADC121C = 2,
    120};
    121
    122static struct adcxx1c_model adcxx1c_models[] = {
    123	ADCxx1C_MODEL(adc081c,  8),
    124	ADCxx1C_MODEL(adc101c, 10),
    125	ADCxx1C_MODEL(adc121c, 12),
    126};
    127
    128static const struct iio_info adc081c_info = {
    129	.read_raw = adc081c_read_raw,
    130};
    131
    132static irqreturn_t adc081c_trigger_handler(int irq, void *p)
    133{
    134	struct iio_poll_func *pf = p;
    135	struct iio_dev *indio_dev = pf->indio_dev;
    136	struct adc081c *data = iio_priv(indio_dev);
    137	int ret;
    138
    139	ret = i2c_smbus_read_word_swapped(data->i2c, REG_CONV_RES);
    140	if (ret < 0)
    141		goto out;
    142	data->scan.channel = ret;
    143	iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
    144					   iio_get_time_ns(indio_dev));
    145out:
    146	iio_trigger_notify_done(indio_dev->trig);
    147	return IRQ_HANDLED;
    148}
    149
    150static void adc081c_reg_disable(void *reg)
    151{
    152	regulator_disable(reg);
    153}
    154
    155static int adc081c_probe(struct i2c_client *client,
    156			 const struct i2c_device_id *id)
    157{
    158	struct iio_dev *iio;
    159	struct adc081c *adc;
    160	const struct adcxx1c_model *model;
    161	int err;
    162
    163	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
    164		return -EOPNOTSUPP;
    165
    166	if (dev_fwnode(&client->dev))
    167		model = device_get_match_data(&client->dev);
    168	else
    169		model = &adcxx1c_models[id->driver_data];
    170
    171	iio = devm_iio_device_alloc(&client->dev, sizeof(*adc));
    172	if (!iio)
    173		return -ENOMEM;
    174
    175	adc = iio_priv(iio);
    176	adc->i2c = client;
    177	adc->bits = model->bits;
    178
    179	adc->ref = devm_regulator_get(&client->dev, "vref");
    180	if (IS_ERR(adc->ref))
    181		return PTR_ERR(adc->ref);
    182
    183	err = regulator_enable(adc->ref);
    184	if (err < 0)
    185		return err;
    186
    187	err = devm_add_action_or_reset(&client->dev, adc081c_reg_disable,
    188				       adc->ref);
    189	if (err)
    190		return err;
    191
    192	iio->name = dev_name(&client->dev);
    193	iio->modes = INDIO_DIRECT_MODE;
    194	iio->info = &adc081c_info;
    195
    196	iio->channels = model->channels;
    197	iio->num_channels = ADC081C_NUM_CHANNELS;
    198
    199	err = devm_iio_triggered_buffer_setup(&client->dev, iio, NULL,
    200					      adc081c_trigger_handler, NULL);
    201	if (err < 0) {
    202		dev_err(&client->dev, "iio triggered buffer setup failed\n");
    203		return err;
    204	}
    205
    206	return devm_iio_device_register(&client->dev, iio);
    207}
    208
    209static const struct i2c_device_id adc081c_id[] = {
    210	{ "adc081c", ADC081C },
    211	{ "adc101c", ADC101C },
    212	{ "adc121c", ADC121C },
    213	{ }
    214};
    215MODULE_DEVICE_TABLE(i2c, adc081c_id);
    216
    217static const struct acpi_device_id adc081c_acpi_match[] = {
    218	/* Used on some AAEON boards */
    219	{ "ADC081C", (kernel_ulong_t)&adcxx1c_models[ADC081C] },
    220	{ }
    221};
    222MODULE_DEVICE_TABLE(acpi, adc081c_acpi_match);
    223
    224static const struct of_device_id adc081c_of_match[] = {
    225	{ .compatible = "ti,adc081c", .data = &adcxx1c_models[ADC081C] },
    226	{ .compatible = "ti,adc101c", .data = &adcxx1c_models[ADC101C] },
    227	{ .compatible = "ti,adc121c", .data = &adcxx1c_models[ADC121C] },
    228	{ }
    229};
    230MODULE_DEVICE_TABLE(of, adc081c_of_match);
    231
    232static struct i2c_driver adc081c_driver = {
    233	.driver = {
    234		.name = "adc081c",
    235		.of_match_table = adc081c_of_match,
    236		.acpi_match_table = adc081c_acpi_match,
    237	},
    238	.probe = adc081c_probe,
    239	.id_table = adc081c_id,
    240};
    241module_i2c_driver(adc081c_driver);
    242
    243MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
    244MODULE_DESCRIPTION("Texas Instruments ADC081C/ADC101C/ADC121C driver");
    245MODULE_LICENSE("GPL v2");