ti-adc108s102.c (8277B)
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * TI ADC108S102 SPI ADC driver 4 * 5 * Copyright (c) 2013-2015 Intel Corporation. 6 * Copyright (c) 2017 Siemens AG 7 * 8 * This IIO device driver is designed to work with the following 9 * analog to digital converters from Texas Instruments: 10 * ADC108S102 11 * ADC128S102 12 * The communication with ADC chip is via the SPI bus (mode 3). 13 */ 14 15#include <linux/acpi.h> 16#include <linux/iio/iio.h> 17#include <linux/iio/buffer.h> 18#include <linux/iio/types.h> 19#include <linux/iio/triggered_buffer.h> 20#include <linux/iio/trigger_consumer.h> 21#include <linux/interrupt.h> 22#include <linux/module.h> 23#include <linux/mod_devicetable.h> 24#include <linux/property.h> 25#include <linux/regulator/consumer.h> 26#include <linux/spi/spi.h> 27 28/* 29 * In case of ACPI, we use the hard-wired 5000 mV of the Galileo and IOT2000 30 * boards as default for the reference pin VA. Device tree users encode that 31 * via the vref-supply regulator. 32 */ 33#define ADC108S102_VA_MV_ACPI_DEFAULT 5000 34 35/* 36 * Defining the ADC resolution being 12 bits, we can use the same driver for 37 * both ADC108S102 (10 bits resolution) and ADC128S102 (12 bits resolution) 38 * chips. The ADC108S102 effectively returns a 12-bit result with the 2 39 * least-significant bits unset. 40 */ 41#define ADC108S102_BITS 12 42#define ADC108S102_MAX_CHANNELS 8 43 44/* 45 * 16-bit SPI command format: 46 * [15:14] Ignored 47 * [13:11] 3-bit channel address 48 * [10:0] Ignored 49 */ 50#define ADC108S102_CMD(ch) ((u16)(ch) << 11) 51 52/* 53 * 16-bit SPI response format: 54 * [15:12] Zeros 55 * [11:0] 12-bit ADC sample (for ADC108S102, [1:0] will always be 0). 56 */ 57#define ADC108S102_RES_DATA(res) ((u16)res & GENMASK(11, 0)) 58 59struct adc108s102_state { 60 struct spi_device *spi; 61 struct regulator *reg; 62 u32 va_millivolt; 63 /* SPI transfer used by triggered buffer handler*/ 64 struct spi_transfer ring_xfer; 65 /* SPI transfer used by direct scan */ 66 struct spi_transfer scan_single_xfer; 67 /* SPI message used by ring_xfer SPI transfer */ 68 struct spi_message ring_msg; 69 /* SPI message used by scan_single_xfer SPI transfer */ 70 struct spi_message scan_single_msg; 71 72 /* 73 * SPI message buffers: 74 * tx_buf: |C0|C1|C2|C3|C4|C5|C6|C7|XX| 75 * rx_buf: |XX|R0|R1|R2|R3|R4|R5|R6|R7|tt|tt|tt|tt| 76 * 77 * tx_buf: 8 channel read commands, plus 1 dummy command 78 * rx_buf: 1 dummy response, 8 channel responses 79 */ 80 __be16 rx_buf[9] ____cacheline_aligned; 81 __be16 tx_buf[9] ____cacheline_aligned; 82}; 83 84#define ADC108S102_V_CHAN(index) \ 85 { \ 86 .type = IIO_VOLTAGE, \ 87 .indexed = 1, \ 88 .channel = index, \ 89 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 90 BIT(IIO_CHAN_INFO_SCALE), \ 91 .address = index, \ 92 .scan_index = index, \ 93 .scan_type = { \ 94 .sign = 'u', \ 95 .realbits = ADC108S102_BITS, \ 96 .storagebits = 16, \ 97 .endianness = IIO_BE, \ 98 }, \ 99 } 100 101static const struct iio_chan_spec adc108s102_channels[] = { 102 ADC108S102_V_CHAN(0), 103 ADC108S102_V_CHAN(1), 104 ADC108S102_V_CHAN(2), 105 ADC108S102_V_CHAN(3), 106 ADC108S102_V_CHAN(4), 107 ADC108S102_V_CHAN(5), 108 ADC108S102_V_CHAN(6), 109 ADC108S102_V_CHAN(7), 110 IIO_CHAN_SOFT_TIMESTAMP(8), 111}; 112 113static int adc108s102_update_scan_mode(struct iio_dev *indio_dev, 114 unsigned long const *active_scan_mask) 115{ 116 struct adc108s102_state *st = iio_priv(indio_dev); 117 unsigned int bit, cmds; 118 119 /* 120 * Fill in the first x shorts of tx_buf with the number of channels 121 * enabled for sampling by the triggered buffer. 122 */ 123 cmds = 0; 124 for_each_set_bit(bit, active_scan_mask, ADC108S102_MAX_CHANNELS) 125 st->tx_buf[cmds++] = cpu_to_be16(ADC108S102_CMD(bit)); 126 127 /* One dummy command added, to clock in the last response */ 128 st->tx_buf[cmds++] = 0x00; 129 130 /* build SPI ring message */ 131 st->ring_xfer.tx_buf = &st->tx_buf[0]; 132 st->ring_xfer.rx_buf = &st->rx_buf[0]; 133 st->ring_xfer.len = cmds * sizeof(st->tx_buf[0]); 134 135 spi_message_init_with_transfers(&st->ring_msg, &st->ring_xfer, 1); 136 137 return 0; 138} 139 140static irqreturn_t adc108s102_trigger_handler(int irq, void *p) 141{ 142 struct iio_poll_func *pf = p; 143 struct iio_dev *indio_dev = pf->indio_dev; 144 struct adc108s102_state *st = iio_priv(indio_dev); 145 int ret; 146 147 ret = spi_sync(st->spi, &st->ring_msg); 148 if (ret < 0) 149 goto out_notify; 150 151 /* Skip the dummy response in the first slot */ 152 iio_push_to_buffers_with_ts_unaligned(indio_dev, 153 &st->rx_buf[1], 154 st->ring_xfer.len - sizeof(st->rx_buf[1]), 155 iio_get_time_ns(indio_dev)); 156 157out_notify: 158 iio_trigger_notify_done(indio_dev->trig); 159 160 return IRQ_HANDLED; 161} 162 163static int adc108s102_scan_direct(struct adc108s102_state *st, unsigned int ch) 164{ 165 int ret; 166 167 st->tx_buf[0] = cpu_to_be16(ADC108S102_CMD(ch)); 168 ret = spi_sync(st->spi, &st->scan_single_msg); 169 if (ret) 170 return ret; 171 172 /* Skip the dummy response in the first slot */ 173 return be16_to_cpu(st->rx_buf[1]); 174} 175 176static int adc108s102_read_raw(struct iio_dev *indio_dev, 177 struct iio_chan_spec const *chan, 178 int *val, int *val2, long m) 179{ 180 struct adc108s102_state *st = iio_priv(indio_dev); 181 int ret; 182 183 switch (m) { 184 case IIO_CHAN_INFO_RAW: 185 ret = iio_device_claim_direct_mode(indio_dev); 186 if (ret) 187 return ret; 188 189 ret = adc108s102_scan_direct(st, chan->address); 190 191 iio_device_release_direct_mode(indio_dev); 192 193 if (ret < 0) 194 return ret; 195 196 *val = ADC108S102_RES_DATA(ret); 197 198 return IIO_VAL_INT; 199 case IIO_CHAN_INFO_SCALE: 200 if (chan->type != IIO_VOLTAGE) 201 break; 202 203 *val = st->va_millivolt; 204 *val2 = chan->scan_type.realbits; 205 206 return IIO_VAL_FRACTIONAL_LOG2; 207 default: 208 break; 209 } 210 211 return -EINVAL; 212} 213 214static const struct iio_info adc108s102_info = { 215 .read_raw = &adc108s102_read_raw, 216 .update_scan_mode = &adc108s102_update_scan_mode, 217}; 218 219static void adc108s102_reg_disable(void *reg) 220{ 221 regulator_disable(reg); 222} 223 224static int adc108s102_probe(struct spi_device *spi) 225{ 226 struct adc108s102_state *st; 227 struct iio_dev *indio_dev; 228 int ret; 229 230 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 231 if (!indio_dev) 232 return -ENOMEM; 233 234 st = iio_priv(indio_dev); 235 236 if (ACPI_COMPANION(&spi->dev)) { 237 st->va_millivolt = ADC108S102_VA_MV_ACPI_DEFAULT; 238 } else { 239 st->reg = devm_regulator_get(&spi->dev, "vref"); 240 if (IS_ERR(st->reg)) 241 return PTR_ERR(st->reg); 242 243 ret = regulator_enable(st->reg); 244 if (ret < 0) { 245 dev_err(&spi->dev, "Cannot enable vref regulator\n"); 246 return ret; 247 } 248 ret = devm_add_action_or_reset(&spi->dev, adc108s102_reg_disable, 249 st->reg); 250 if (ret) 251 return ret; 252 253 ret = regulator_get_voltage(st->reg); 254 if (ret < 0) { 255 dev_err(&spi->dev, "vref get voltage failed\n"); 256 return ret; 257 } 258 259 st->va_millivolt = ret / 1000; 260 } 261 262 st->spi = spi; 263 264 indio_dev->name = spi->modalias; 265 indio_dev->modes = INDIO_DIRECT_MODE; 266 indio_dev->channels = adc108s102_channels; 267 indio_dev->num_channels = ARRAY_SIZE(adc108s102_channels); 268 indio_dev->info = &adc108s102_info; 269 270 /* Setup default message */ 271 st->scan_single_xfer.tx_buf = st->tx_buf; 272 st->scan_single_xfer.rx_buf = st->rx_buf; 273 st->scan_single_xfer.len = 2 * sizeof(st->tx_buf[0]); 274 275 spi_message_init_with_transfers(&st->scan_single_msg, 276 &st->scan_single_xfer, 1); 277 278 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL, 279 &adc108s102_trigger_handler, 280 NULL); 281 if (ret) 282 return ret; 283 284 ret = devm_iio_device_register(&spi->dev, indio_dev); 285 if (ret) 286 dev_err(&spi->dev, "Failed to register IIO device\n"); 287 return ret; 288} 289 290static const struct of_device_id adc108s102_of_match[] = { 291 { .compatible = "ti,adc108s102" }, 292 { } 293}; 294MODULE_DEVICE_TABLE(of, adc108s102_of_match); 295 296#ifdef CONFIG_ACPI 297static const struct acpi_device_id adc108s102_acpi_ids[] = { 298 { "INT3495", 0 }, 299 { } 300}; 301MODULE_DEVICE_TABLE(acpi, adc108s102_acpi_ids); 302#endif 303 304static const struct spi_device_id adc108s102_id[] = { 305 { "adc108s102", 0 }, 306 { } 307}; 308MODULE_DEVICE_TABLE(spi, adc108s102_id); 309 310static struct spi_driver adc108s102_driver = { 311 .driver = { 312 .name = "adc108s102", 313 .of_match_table = adc108s102_of_match, 314 .acpi_match_table = ACPI_PTR(adc108s102_acpi_ids), 315 }, 316 .probe = adc108s102_probe, 317 .id_table = adc108s102_id, 318}; 319module_spi_driver(adc108s102_driver); 320 321MODULE_AUTHOR("Bogdan Pricop <bogdan.pricop@emutex.com>"); 322MODULE_DESCRIPTION("Texas Instruments ADC108S102 and ADC128S102 driver"); 323MODULE_LICENSE("GPL v2");