cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fxas21002c.h (2175B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Driver for NXP FXAS21002C Gyroscope - Header
      4 *
      5 * Copyright (C) 2019 Linaro Ltd.
      6 */
      7
      8#ifndef FXAS21002C_H_
      9#define FXAS21002C_H_
     10
     11#include <linux/regmap.h>
     12
     13#define FXAS21002C_REG_STATUS		0x00
     14#define FXAS21002C_REG_OUT_X_MSB	0x01
     15#define FXAS21002C_REG_OUT_X_LSB	0x02
     16#define FXAS21002C_REG_OUT_Y_MSB	0x03
     17#define FXAS21002C_REG_OUT_Y_LSB	0x04
     18#define FXAS21002C_REG_OUT_Z_MSB	0x05
     19#define FXAS21002C_REG_OUT_Z_LSB	0x06
     20#define FXAS21002C_REG_DR_STATUS	0x07
     21#define FXAS21002C_REG_F_STATUS		0x08
     22#define FXAS21002C_REG_F_SETUP		0x09
     23#define FXAS21002C_REG_F_EVENT		0x0A
     24#define FXAS21002C_REG_INT_SRC_FLAG	0x0B
     25#define FXAS21002C_REG_WHO_AM_I		0x0C
     26#define FXAS21002C_REG_CTRL0		0x0D
     27#define FXAS21002C_REG_RT_CFG		0x0E
     28#define FXAS21002C_REG_RT_SRC		0x0F
     29#define FXAS21002C_REG_RT_THS		0x10
     30#define FXAS21002C_REG_RT_COUNT		0x11
     31#define FXAS21002C_REG_TEMP		0x12
     32#define FXAS21002C_REG_CTRL1		0x13
     33#define FXAS21002C_REG_CTRL2		0x14
     34#define FXAS21002C_REG_CTRL3		0x15
     35
     36enum fxas21002c_fields {
     37	F_DR_STATUS,
     38	F_OUT_X_MSB,
     39	F_OUT_X_LSB,
     40	F_OUT_Y_MSB,
     41	F_OUT_Y_LSB,
     42	F_OUT_Z_MSB,
     43	F_OUT_Z_LSB,
     44	/* DR_STATUS */
     45	F_ZYX_OW, F_Z_OW, F_Y_OW, F_X_OW, F_ZYX_DR, F_Z_DR, F_Y_DR, F_X_DR,
     46	/* F_STATUS */
     47	F_OVF, F_WMKF, F_CNT,
     48	/* F_SETUP */
     49	F_MODE, F_WMRK,
     50	/* F_EVENT */
     51	F_EVENT, FE_TIME,
     52	/* INT_SOURCE_FLAG */
     53	F_BOOTEND, F_SRC_FIFO, F_SRC_RT, F_SRC_DRDY,
     54	/* WHO_AM_I */
     55	F_WHO_AM_I,
     56	/* CTRL_REG0 */
     57	F_BW, F_SPIW, F_SEL, F_HPF_EN, F_FS,
     58	/* RT_CFG */
     59	F_ELE, F_ZTEFE, F_YTEFE, F_XTEFE,
     60	/* RT_SRC */
     61	F_EA, F_ZRT, F_ZRT_POL, F_YRT, F_YRT_POL, F_XRT, F_XRT_POL,
     62	/* RT_THS */
     63	F_DBCNTM, F_THS,
     64	/* RT_COUNT */
     65	F_RT_COUNT,
     66	/* TEMP */
     67	F_TEMP,
     68	/* CTRL_REG1 */
     69	F_RST, F_ST, F_DR, F_ACTIVE, F_READY,
     70	/* CTRL_REG2 */
     71	F_INT_CFG_FIFO, F_INT_EN_FIFO, F_INT_CFG_RT, F_INT_EN_RT,
     72	F_INT_CFG_DRDY, F_INT_EN_DRDY, F_IPOL, F_PP_OD,
     73	/* CTRL_REG3 */
     74	F_WRAPTOONE, F_EXTCTRLEN, F_FS_DOUBLE,
     75	/* MAX FIELDS */
     76	F_MAX_FIELDS,
     77};
     78
     79extern const struct dev_pm_ops fxas21002c_pm_ops;
     80
     81int fxas21002c_core_probe(struct device *dev, struct regmap *regmap, int irq,
     82			  const char *name);
     83void fxas21002c_core_remove(struct device *dev);
     84#endif