afe4404.c (17035B)
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * AFE4404 Heart Rate Monitors and Low-Cost Pulse Oximeters 4 * 5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ 6 * Andrew F. Davis <afd@ti.com> 7 */ 8 9#include <linux/device.h> 10#include <linux/err.h> 11#include <linux/interrupt.h> 12#include <linux/i2c.h> 13#include <linux/kernel.h> 14#include <linux/module.h> 15#include <linux/regmap.h> 16#include <linux/sysfs.h> 17#include <linux/regulator/consumer.h> 18 19#include <linux/iio/iio.h> 20#include <linux/iio/sysfs.h> 21#include <linux/iio/buffer.h> 22#include <linux/iio/trigger.h> 23#include <linux/iio/triggered_buffer.h> 24#include <linux/iio/trigger_consumer.h> 25 26#include "afe440x.h" 27 28#define AFE4404_DRIVER_NAME "afe4404" 29 30/* AFE4404 registers */ 31#define AFE4404_TIA_GAIN_SEP 0x20 32#define AFE4404_TIA_GAIN 0x21 33#define AFE4404_PROG_TG_STC 0x34 34#define AFE4404_PROG_TG_ENDC 0x35 35#define AFE4404_LED3LEDSTC 0x36 36#define AFE4404_LED3LEDENDC 0x37 37#define AFE4404_CLKDIV_PRF 0x39 38#define AFE4404_OFFDAC 0x3a 39#define AFE4404_DEC 0x3d 40#define AFE4404_AVG_LED2_ALED2VAL 0x3f 41#define AFE4404_AVG_LED1_ALED1VAL 0x40 42 43/* AFE4404 CONTROL2 register fields */ 44#define AFE440X_CONTROL2_OSC_ENABLE BIT(9) 45 46enum afe4404_fields { 47 /* Gains */ 48 F_TIA_GAIN_SEP, F_TIA_CF_SEP, 49 F_TIA_GAIN, TIA_CF, 50 51 /* LED Current */ 52 F_ILED1, F_ILED2, F_ILED3, 53 54 /* Offset DAC */ 55 F_OFFDAC_AMB2, F_OFFDAC_LED1, F_OFFDAC_AMB1, F_OFFDAC_LED2, 56 57 /* sentinel */ 58 F_MAX_FIELDS 59}; 60 61static const struct reg_field afe4404_reg_fields[] = { 62 /* Gains */ 63 [F_TIA_GAIN_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 0, 2), 64 [F_TIA_CF_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 3, 5), 65 [F_TIA_GAIN] = REG_FIELD(AFE4404_TIA_GAIN, 0, 2), 66 [TIA_CF] = REG_FIELD(AFE4404_TIA_GAIN, 3, 5), 67 /* LED Current */ 68 [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 5), 69 [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 6, 11), 70 [F_ILED3] = REG_FIELD(AFE440X_LEDCNTRL, 12, 17), 71 /* Offset DAC */ 72 [F_OFFDAC_AMB2] = REG_FIELD(AFE4404_OFFDAC, 0, 4), 73 [F_OFFDAC_LED1] = REG_FIELD(AFE4404_OFFDAC, 5, 9), 74 [F_OFFDAC_AMB1] = REG_FIELD(AFE4404_OFFDAC, 10, 14), 75 [F_OFFDAC_LED2] = REG_FIELD(AFE4404_OFFDAC, 15, 19), 76}; 77 78/** 79 * struct afe4404_data - AFE4404 device instance data 80 * @dev: Device structure 81 * @regmap: Register map of the device 82 * @fields: Register fields of the device 83 * @regulator: Pointer to the regulator for the IC 84 * @trig: IIO trigger for this device 85 * @irq: ADC_RDY line interrupt number 86 * @buffer: Used to construct a scan to push to the iio buffer. 87 */ 88struct afe4404_data { 89 struct device *dev; 90 struct regmap *regmap; 91 struct regmap_field *fields[F_MAX_FIELDS]; 92 struct regulator *regulator; 93 struct iio_trigger *trig; 94 int irq; 95 s32 buffer[10] __aligned(8); 96}; 97 98enum afe4404_chan_id { 99 LED2 = 1, 100 ALED2, 101 LED1, 102 ALED1, 103 LED2_ALED2, 104 LED1_ALED1, 105}; 106 107static const unsigned int afe4404_channel_values[] = { 108 [LED2] = AFE440X_LED2VAL, 109 [ALED2] = AFE440X_ALED2VAL, 110 [LED1] = AFE440X_LED1VAL, 111 [ALED1] = AFE440X_ALED1VAL, 112 [LED2_ALED2] = AFE440X_LED2_ALED2VAL, 113 [LED1_ALED1] = AFE440X_LED1_ALED1VAL, 114}; 115 116static const unsigned int afe4404_channel_leds[] = { 117 [LED2] = F_ILED2, 118 [ALED2] = F_ILED3, 119 [LED1] = F_ILED1, 120}; 121 122static const unsigned int afe4404_channel_offdacs[] = { 123 [LED2] = F_OFFDAC_LED2, 124 [ALED2] = F_OFFDAC_AMB2, 125 [LED1] = F_OFFDAC_LED1, 126 [ALED1] = F_OFFDAC_AMB1, 127}; 128 129static const struct iio_chan_spec afe4404_channels[] = { 130 /* ADC values */ 131 AFE440X_INTENSITY_CHAN(LED2, BIT(IIO_CHAN_INFO_OFFSET)), 132 AFE440X_INTENSITY_CHAN(ALED2, BIT(IIO_CHAN_INFO_OFFSET)), 133 AFE440X_INTENSITY_CHAN(LED1, BIT(IIO_CHAN_INFO_OFFSET)), 134 AFE440X_INTENSITY_CHAN(ALED1, BIT(IIO_CHAN_INFO_OFFSET)), 135 AFE440X_INTENSITY_CHAN(LED2_ALED2, 0), 136 AFE440X_INTENSITY_CHAN(LED1_ALED1, 0), 137 /* LED current */ 138 AFE440X_CURRENT_CHAN(LED2), 139 AFE440X_CURRENT_CHAN(ALED2), 140 AFE440X_CURRENT_CHAN(LED1), 141}; 142 143static const struct afe440x_val_table afe4404_res_table[] = { 144 { .integer = 500000, .fract = 0 }, 145 { .integer = 250000, .fract = 0 }, 146 { .integer = 100000, .fract = 0 }, 147 { .integer = 50000, .fract = 0 }, 148 { .integer = 25000, .fract = 0 }, 149 { .integer = 10000, .fract = 0 }, 150 { .integer = 1000000, .fract = 0 }, 151 { .integer = 2000000, .fract = 0 }, 152}; 153AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4404_res_table); 154 155static const struct afe440x_val_table afe4404_cap_table[] = { 156 { .integer = 0, .fract = 5000 }, 157 { .integer = 0, .fract = 2500 }, 158 { .integer = 0, .fract = 10000 }, 159 { .integer = 0, .fract = 7500 }, 160 { .integer = 0, .fract = 20000 }, 161 { .integer = 0, .fract = 17500 }, 162 { .integer = 0, .fract = 25000 }, 163 { .integer = 0, .fract = 22500 }, 164}; 165AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4404_cap_table); 166 167static ssize_t afe440x_show_register(struct device *dev, 168 struct device_attribute *attr, 169 char *buf) 170{ 171 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 172 struct afe4404_data *afe = iio_priv(indio_dev); 173 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 174 unsigned int reg_val; 175 int vals[2]; 176 int ret; 177 178 ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val); 179 if (ret) 180 return ret; 181 182 if (reg_val >= afe440x_attr->table_size) 183 return -EINVAL; 184 185 vals[0] = afe440x_attr->val_table[reg_val].integer; 186 vals[1] = afe440x_attr->val_table[reg_val].fract; 187 188 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); 189} 190 191static ssize_t afe440x_store_register(struct device *dev, 192 struct device_attribute *attr, 193 const char *buf, size_t count) 194{ 195 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 196 struct afe4404_data *afe = iio_priv(indio_dev); 197 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 198 int val, integer, fract, ret; 199 200 ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract); 201 if (ret) 202 return ret; 203 204 for (val = 0; val < afe440x_attr->table_size; val++) 205 if (afe440x_attr->val_table[val].integer == integer && 206 afe440x_attr->val_table[val].fract == fract) 207 break; 208 if (val == afe440x_attr->table_size) 209 return -EINVAL; 210 211 ret = regmap_field_write(afe->fields[afe440x_attr->field], val); 212 if (ret) 213 return ret; 214 215 return count; 216} 217 218static AFE440X_ATTR(in_intensity1_resistance, F_TIA_GAIN_SEP, afe4404_res_table); 219static AFE440X_ATTR(in_intensity1_capacitance, F_TIA_CF_SEP, afe4404_cap_table); 220 221static AFE440X_ATTR(in_intensity2_resistance, F_TIA_GAIN_SEP, afe4404_res_table); 222static AFE440X_ATTR(in_intensity2_capacitance, F_TIA_CF_SEP, afe4404_cap_table); 223 224static AFE440X_ATTR(in_intensity3_resistance, F_TIA_GAIN, afe4404_res_table); 225static AFE440X_ATTR(in_intensity3_capacitance, TIA_CF, afe4404_cap_table); 226 227static AFE440X_ATTR(in_intensity4_resistance, F_TIA_GAIN, afe4404_res_table); 228static AFE440X_ATTR(in_intensity4_capacitance, TIA_CF, afe4404_cap_table); 229 230static struct attribute *afe440x_attributes[] = { 231 &dev_attr_in_intensity_resistance_available.attr, 232 &dev_attr_in_intensity_capacitance_available.attr, 233 &afe440x_attr_in_intensity1_resistance.dev_attr.attr, 234 &afe440x_attr_in_intensity1_capacitance.dev_attr.attr, 235 &afe440x_attr_in_intensity2_resistance.dev_attr.attr, 236 &afe440x_attr_in_intensity2_capacitance.dev_attr.attr, 237 &afe440x_attr_in_intensity3_resistance.dev_attr.attr, 238 &afe440x_attr_in_intensity3_capacitance.dev_attr.attr, 239 &afe440x_attr_in_intensity4_resistance.dev_attr.attr, 240 &afe440x_attr_in_intensity4_capacitance.dev_attr.attr, 241 NULL 242}; 243 244static const struct attribute_group afe440x_attribute_group = { 245 .attrs = afe440x_attributes 246}; 247 248static int afe4404_read_raw(struct iio_dev *indio_dev, 249 struct iio_chan_spec const *chan, 250 int *val, int *val2, long mask) 251{ 252 struct afe4404_data *afe = iio_priv(indio_dev); 253 unsigned int value_reg = afe4404_channel_values[chan->address]; 254 unsigned int led_field = afe4404_channel_leds[chan->address]; 255 unsigned int offdac_field = afe4404_channel_offdacs[chan->address]; 256 int ret; 257 258 switch (chan->type) { 259 case IIO_INTENSITY: 260 switch (mask) { 261 case IIO_CHAN_INFO_RAW: 262 ret = regmap_read(afe->regmap, value_reg, val); 263 if (ret) 264 return ret; 265 return IIO_VAL_INT; 266 case IIO_CHAN_INFO_OFFSET: 267 ret = regmap_field_read(afe->fields[offdac_field], val); 268 if (ret) 269 return ret; 270 return IIO_VAL_INT; 271 } 272 break; 273 case IIO_CURRENT: 274 switch (mask) { 275 case IIO_CHAN_INFO_RAW: 276 ret = regmap_field_read(afe->fields[led_field], val); 277 if (ret) 278 return ret; 279 return IIO_VAL_INT; 280 case IIO_CHAN_INFO_SCALE: 281 *val = 0; 282 *val2 = 800000; 283 return IIO_VAL_INT_PLUS_MICRO; 284 } 285 break; 286 default: 287 break; 288 } 289 290 return -EINVAL; 291} 292 293static int afe4404_write_raw(struct iio_dev *indio_dev, 294 struct iio_chan_spec const *chan, 295 int val, int val2, long mask) 296{ 297 struct afe4404_data *afe = iio_priv(indio_dev); 298 unsigned int led_field = afe4404_channel_leds[chan->address]; 299 unsigned int offdac_field = afe4404_channel_offdacs[chan->address]; 300 301 switch (chan->type) { 302 case IIO_INTENSITY: 303 switch (mask) { 304 case IIO_CHAN_INFO_OFFSET: 305 return regmap_field_write(afe->fields[offdac_field], val); 306 } 307 break; 308 case IIO_CURRENT: 309 switch (mask) { 310 case IIO_CHAN_INFO_RAW: 311 return regmap_field_write(afe->fields[led_field], val); 312 } 313 break; 314 default: 315 break; 316 } 317 318 return -EINVAL; 319} 320 321static const struct iio_info afe4404_iio_info = { 322 .attrs = &afe440x_attribute_group, 323 .read_raw = afe4404_read_raw, 324 .write_raw = afe4404_write_raw, 325}; 326 327static irqreturn_t afe4404_trigger_handler(int irq, void *private) 328{ 329 struct iio_poll_func *pf = private; 330 struct iio_dev *indio_dev = pf->indio_dev; 331 struct afe4404_data *afe = iio_priv(indio_dev); 332 int ret, bit, i = 0; 333 334 for_each_set_bit(bit, indio_dev->active_scan_mask, 335 indio_dev->masklength) { 336 ret = regmap_read(afe->regmap, afe4404_channel_values[bit], 337 &afe->buffer[i++]); 338 if (ret) 339 goto err; 340 } 341 342 iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer, 343 pf->timestamp); 344err: 345 iio_trigger_notify_done(indio_dev->trig); 346 347 return IRQ_HANDLED; 348} 349 350/* Default timings from data-sheet */ 351#define AFE4404_TIMING_PAIRS \ 352 { AFE440X_PRPCOUNT, 39999 }, \ 353 { AFE440X_LED2LEDSTC, 0 }, \ 354 { AFE440X_LED2LEDENDC, 398 }, \ 355 { AFE440X_LED2STC, 80 }, \ 356 { AFE440X_LED2ENDC, 398 }, \ 357 { AFE440X_ADCRSTSTCT0, 5600 }, \ 358 { AFE440X_ADCRSTENDCT0, 5606 }, \ 359 { AFE440X_LED2CONVST, 5607 }, \ 360 { AFE440X_LED2CONVEND, 6066 }, \ 361 { AFE4404_LED3LEDSTC, 400 }, \ 362 { AFE4404_LED3LEDENDC, 798 }, \ 363 { AFE440X_ALED2STC, 480 }, \ 364 { AFE440X_ALED2ENDC, 798 }, \ 365 { AFE440X_ADCRSTSTCT1, 6068 }, \ 366 { AFE440X_ADCRSTENDCT1, 6074 }, \ 367 { AFE440X_ALED2CONVST, 6075 }, \ 368 { AFE440X_ALED2CONVEND, 6534 }, \ 369 { AFE440X_LED1LEDSTC, 800 }, \ 370 { AFE440X_LED1LEDENDC, 1198 }, \ 371 { AFE440X_LED1STC, 880 }, \ 372 { AFE440X_LED1ENDC, 1198 }, \ 373 { AFE440X_ADCRSTSTCT2, 6536 }, \ 374 { AFE440X_ADCRSTENDCT2, 6542 }, \ 375 { AFE440X_LED1CONVST, 6543 }, \ 376 { AFE440X_LED1CONVEND, 7003 }, \ 377 { AFE440X_ALED1STC, 1280 }, \ 378 { AFE440X_ALED1ENDC, 1598 }, \ 379 { AFE440X_ADCRSTSTCT3, 7005 }, \ 380 { AFE440X_ADCRSTENDCT3, 7011 }, \ 381 { AFE440X_ALED1CONVST, 7012 }, \ 382 { AFE440X_ALED1CONVEND, 7471 }, \ 383 { AFE440X_PDNCYCLESTC, 7671 }, \ 384 { AFE440X_PDNCYCLEENDC, 39199 } 385 386static const struct reg_sequence afe4404_reg_sequences[] = { 387 AFE4404_TIMING_PAIRS, 388 { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN }, 389 { AFE4404_TIA_GAIN_SEP, AFE440X_TIAGAIN_ENSEPGAIN }, 390 { AFE440X_CONTROL2, AFE440X_CONTROL2_OSC_ENABLE }, 391}; 392 393static const struct regmap_range afe4404_yes_ranges[] = { 394 regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL), 395 regmap_reg_range(AFE4404_AVG_LED2_ALED2VAL, AFE4404_AVG_LED1_ALED1VAL), 396}; 397 398static const struct regmap_access_table afe4404_volatile_table = { 399 .yes_ranges = afe4404_yes_ranges, 400 .n_yes_ranges = ARRAY_SIZE(afe4404_yes_ranges), 401}; 402 403static const struct regmap_config afe4404_regmap_config = { 404 .reg_bits = 8, 405 .val_bits = 24, 406 407 .max_register = AFE4404_AVG_LED1_ALED1VAL, 408 .cache_type = REGCACHE_RBTREE, 409 .volatile_table = &afe4404_volatile_table, 410}; 411 412static const struct of_device_id afe4404_of_match[] = { 413 { .compatible = "ti,afe4404", }, 414 { /* sentinel */ } 415}; 416MODULE_DEVICE_TABLE(of, afe4404_of_match); 417 418static int __maybe_unused afe4404_suspend(struct device *dev) 419{ 420 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 421 struct afe4404_data *afe = iio_priv(indio_dev); 422 int ret; 423 424 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, 425 AFE440X_CONTROL2_PDN_AFE, 426 AFE440X_CONTROL2_PDN_AFE); 427 if (ret) 428 return ret; 429 430 ret = regulator_disable(afe->regulator); 431 if (ret) { 432 dev_err(dev, "Unable to disable regulator\n"); 433 return ret; 434 } 435 436 return 0; 437} 438 439static int __maybe_unused afe4404_resume(struct device *dev) 440{ 441 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 442 struct afe4404_data *afe = iio_priv(indio_dev); 443 int ret; 444 445 ret = regulator_enable(afe->regulator); 446 if (ret) { 447 dev_err(dev, "Unable to enable regulator\n"); 448 return ret; 449 } 450 451 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, 452 AFE440X_CONTROL2_PDN_AFE, 0); 453 if (ret) 454 return ret; 455 456 return 0; 457} 458 459static SIMPLE_DEV_PM_OPS(afe4404_pm_ops, afe4404_suspend, afe4404_resume); 460 461static int afe4404_probe(struct i2c_client *client, 462 const struct i2c_device_id *id) 463{ 464 struct iio_dev *indio_dev; 465 struct afe4404_data *afe; 466 int i, ret; 467 468 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*afe)); 469 if (!indio_dev) 470 return -ENOMEM; 471 472 afe = iio_priv(indio_dev); 473 i2c_set_clientdata(client, indio_dev); 474 475 afe->dev = &client->dev; 476 afe->irq = client->irq; 477 478 afe->regmap = devm_regmap_init_i2c(client, &afe4404_regmap_config); 479 if (IS_ERR(afe->regmap)) { 480 dev_err(afe->dev, "Unable to allocate register map\n"); 481 return PTR_ERR(afe->regmap); 482 } 483 484 for (i = 0; i < F_MAX_FIELDS; i++) { 485 afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap, 486 afe4404_reg_fields[i]); 487 if (IS_ERR(afe->fields[i])) { 488 dev_err(afe->dev, "Unable to allocate regmap fields\n"); 489 return PTR_ERR(afe->fields[i]); 490 } 491 } 492 493 afe->regulator = devm_regulator_get(afe->dev, "tx_sup"); 494 if (IS_ERR(afe->regulator)) 495 return dev_err_probe(afe->dev, PTR_ERR(afe->regulator), 496 "Unable to get regulator\n"); 497 498 ret = regulator_enable(afe->regulator); 499 if (ret) { 500 dev_err(afe->dev, "Unable to enable regulator\n"); 501 return ret; 502 } 503 504 ret = regmap_write(afe->regmap, AFE440X_CONTROL0, 505 AFE440X_CONTROL0_SW_RESET); 506 if (ret) { 507 dev_err(afe->dev, "Unable to reset device\n"); 508 goto disable_reg; 509 } 510 511 ret = regmap_multi_reg_write(afe->regmap, afe4404_reg_sequences, 512 ARRAY_SIZE(afe4404_reg_sequences)); 513 if (ret) { 514 dev_err(afe->dev, "Unable to set register defaults\n"); 515 goto disable_reg; 516 } 517 518 indio_dev->modes = INDIO_DIRECT_MODE; 519 indio_dev->channels = afe4404_channels; 520 indio_dev->num_channels = ARRAY_SIZE(afe4404_channels); 521 indio_dev->name = AFE4404_DRIVER_NAME; 522 indio_dev->info = &afe4404_iio_info; 523 524 if (afe->irq > 0) { 525 afe->trig = devm_iio_trigger_alloc(afe->dev, 526 "%s-dev%d", 527 indio_dev->name, 528 iio_device_id(indio_dev)); 529 if (!afe->trig) { 530 dev_err(afe->dev, "Unable to allocate IIO trigger\n"); 531 ret = -ENOMEM; 532 goto disable_reg; 533 } 534 535 iio_trigger_set_drvdata(afe->trig, indio_dev); 536 537 ret = iio_trigger_register(afe->trig); 538 if (ret) { 539 dev_err(afe->dev, "Unable to register IIO trigger\n"); 540 goto disable_reg; 541 } 542 543 ret = devm_request_threaded_irq(afe->dev, afe->irq, 544 iio_trigger_generic_data_rdy_poll, 545 NULL, IRQF_ONESHOT, 546 AFE4404_DRIVER_NAME, 547 afe->trig); 548 if (ret) { 549 dev_err(afe->dev, "Unable to request IRQ\n"); 550 goto disable_reg; 551 } 552 } 553 554 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, 555 afe4404_trigger_handler, NULL); 556 if (ret) { 557 dev_err(afe->dev, "Unable to setup buffer\n"); 558 goto unregister_trigger; 559 } 560 561 ret = iio_device_register(indio_dev); 562 if (ret) { 563 dev_err(afe->dev, "Unable to register IIO device\n"); 564 goto unregister_triggered_buffer; 565 } 566 567 return 0; 568 569unregister_triggered_buffer: 570 iio_triggered_buffer_cleanup(indio_dev); 571unregister_trigger: 572 if (afe->irq > 0) 573 iio_trigger_unregister(afe->trig); 574disable_reg: 575 regulator_disable(afe->regulator); 576 577 return ret; 578} 579 580static int afe4404_remove(struct i2c_client *client) 581{ 582 struct iio_dev *indio_dev = i2c_get_clientdata(client); 583 struct afe4404_data *afe = iio_priv(indio_dev); 584 int ret; 585 586 iio_device_unregister(indio_dev); 587 588 iio_triggered_buffer_cleanup(indio_dev); 589 590 if (afe->irq > 0) 591 iio_trigger_unregister(afe->trig); 592 593 ret = regulator_disable(afe->regulator); 594 if (ret) { 595 dev_err(afe->dev, "Unable to disable regulator\n"); 596 return ret; 597 } 598 599 return 0; 600} 601 602static const struct i2c_device_id afe4404_ids[] = { 603 { "afe4404", 0 }, 604 { /* sentinel */ } 605}; 606MODULE_DEVICE_TABLE(i2c, afe4404_ids); 607 608static struct i2c_driver afe4404_i2c_driver = { 609 .driver = { 610 .name = AFE4404_DRIVER_NAME, 611 .of_match_table = afe4404_of_match, 612 .pm = &afe4404_pm_ops, 613 }, 614 .probe = afe4404_probe, 615 .remove = afe4404_remove, 616 .id_table = afe4404_ids, 617}; 618module_i2c_driver(afe4404_i2c_driver); 619 620MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 621MODULE_DESCRIPTION("TI AFE4404 Heart Rate Monitor and Pulse Oximeter AFE"); 622MODULE_LICENSE("GPL v2");