cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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inv_mpu_aux.c (5242B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (C) 2019 TDK-InvenSense, Inc.
      4 */
      5
      6#include <linux/kernel.h>
      7#include <linux/device.h>
      8#include <linux/regmap.h>
      9#include <linux/delay.h>
     10
     11#include "inv_mpu_aux.h"
     12#include "inv_mpu_iio.h"
     13
     14/*
     15 * i2c master auxiliary bus transfer function.
     16 * Requires the i2c operations to be correctly setup before.
     17 */
     18static int inv_mpu_i2c_master_xfer(const struct inv_mpu6050_state *st)
     19{
     20	/* use 50hz frequency for xfer */
     21	const unsigned int freq = 50;
     22	const unsigned int period_ms = 1000 / freq;
     23	uint8_t d;
     24	unsigned int user_ctrl;
     25	int ret;
     26
     27	/* set sample rate */
     28	d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(freq);
     29	ret = regmap_write(st->map, st->reg->sample_rate_div, d);
     30	if (ret)
     31		return ret;
     32
     33	/* start i2c master */
     34	user_ctrl = st->chip_config.user_ctrl | INV_MPU6050_BIT_I2C_MST_EN;
     35	ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
     36	if (ret)
     37		goto error_restore_rate;
     38
     39	/* wait for xfer: 1 period + half-period margin */
     40	msleep(period_ms + period_ms / 2);
     41
     42	/* stop i2c master */
     43	user_ctrl = st->chip_config.user_ctrl;
     44	ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
     45	if (ret)
     46		goto error_stop_i2c;
     47
     48	/* restore sample rate */
     49	d = st->chip_config.divider;
     50	ret = regmap_write(st->map, st->reg->sample_rate_div, d);
     51	if (ret)
     52		goto error_restore_rate;
     53
     54	return 0;
     55
     56error_stop_i2c:
     57	regmap_write(st->map, st->reg->user_ctrl, st->chip_config.user_ctrl);
     58error_restore_rate:
     59	regmap_write(st->map, st->reg->sample_rate_div, st->chip_config.divider);
     60	return ret;
     61}
     62
     63/**
     64 * inv_mpu_aux_init() - init i2c auxiliary bus
     65 * @st: driver internal state
     66 *
     67 * Returns 0 on success, a negative error code otherwise.
     68 */
     69int inv_mpu_aux_init(const struct inv_mpu6050_state *st)
     70{
     71	unsigned int val;
     72	int ret;
     73
     74	/* configure i2c master */
     75	val = INV_MPU6050_BITS_I2C_MST_CLK_400KHZ |
     76			INV_MPU6050_BIT_WAIT_FOR_ES;
     77	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_MST_CTRL, val);
     78	if (ret)
     79		return ret;
     80
     81	/* configure i2c master delay */
     82	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV4_CTRL, 0);
     83	if (ret)
     84		return ret;
     85
     86	val = INV_MPU6050_BIT_I2C_SLV0_DLY_EN |
     87			INV_MPU6050_BIT_I2C_SLV1_DLY_EN |
     88			INV_MPU6050_BIT_I2C_SLV2_DLY_EN |
     89			INV_MPU6050_BIT_I2C_SLV3_DLY_EN |
     90			INV_MPU6050_BIT_DELAY_ES_SHADOW;
     91	return regmap_write(st->map, INV_MPU6050_REG_I2C_MST_DELAY_CTRL, val);
     92}
     93
     94/**
     95 * inv_mpu_aux_read() - read register function for i2c auxiliary bus
     96 * @st: driver internal state.
     97 * @addr: chip i2c Address
     98 * @reg: chip register address
     99 * @val: buffer for storing read bytes
    100 * @size: number of bytes to read
    101 *
    102 *  Returns 0 on success, a negative error code otherwise.
    103 */
    104int inv_mpu_aux_read(const struct inv_mpu6050_state *st, uint8_t addr,
    105		     uint8_t reg, uint8_t *val, size_t size)
    106{
    107	unsigned int status;
    108	int ret;
    109
    110	if (size > 0x0F)
    111		return -EINVAL;
    112
    113	/* setup i2c SLV0 control: i2c addr, register, enable + size */
    114	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0),
    115			   INV_MPU6050_BIT_I2C_SLV_RNW | addr);
    116	if (ret)
    117		return ret;
    118	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0), reg);
    119	if (ret)
    120		return ret;
    121	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0),
    122			   INV_MPU6050_BIT_SLV_EN | size);
    123	if (ret)
    124		return ret;
    125
    126	/* do i2c xfer */
    127	ret = inv_mpu_i2c_master_xfer(st);
    128	if (ret)
    129		goto error_disable_i2c;
    130
    131	/* disable i2c slave */
    132	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0);
    133	if (ret)
    134		goto error_disable_i2c;
    135
    136	/* check i2c status */
    137	ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status);
    138	if (ret)
    139		return ret;
    140	if (status & INV_MPU6050_BIT_I2C_SLV0_NACK)
    141		return -EIO;
    142
    143	/* read data in registers */
    144	return regmap_bulk_read(st->map, INV_MPU6050_REG_EXT_SENS_DATA,
    145				val, size);
    146
    147error_disable_i2c:
    148	regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0);
    149	return ret;
    150}
    151
    152/**
    153 * inv_mpu_aux_write() - write register function for i2c auxiliary bus
    154 * @st: driver internal state.
    155 * @addr: chip i2c Address
    156 * @reg: chip register address
    157 * @val: 1 byte value to write
    158 *
    159 *  Returns 0 on success, a negative error code otherwise.
    160 */
    161int inv_mpu_aux_write(const struct inv_mpu6050_state *st, uint8_t addr,
    162		      uint8_t reg, uint8_t val)
    163{
    164	unsigned int status;
    165	int ret;
    166
    167	/* setup i2c SLV0 control: i2c addr, register, value, enable + size */
    168	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0), addr);
    169	if (ret)
    170		return ret;
    171	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0), reg);
    172	if (ret)
    173		return ret;
    174	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_DO(0), val);
    175	if (ret)
    176		return ret;
    177	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0),
    178			   INV_MPU6050_BIT_SLV_EN | 1);
    179	if (ret)
    180		return ret;
    181
    182	/* do i2c xfer */
    183	ret = inv_mpu_i2c_master_xfer(st);
    184	if (ret)
    185		goto error_disable_i2c;
    186
    187	/* disable i2c slave */
    188	ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0);
    189	if (ret)
    190		goto error_disable_i2c;
    191
    192	/* check i2c status */
    193	ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status);
    194	if (ret)
    195		return ret;
    196	if (status & INV_MPU6050_BIT_I2C_SLV0_NACK)
    197		return -EIO;
    198
    199	return 0;
    200
    201error_disable_i2c:
    202	regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0);
    203	return ret;
    204}