cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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srq.h (1581B)


      1/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
      2/*
      3 * Copyright (c) 2013-2018, Mellanox Technologies. All rights reserved.
      4 */
      5
      6#ifndef MLX5_IB_SRQ_H
      7#define MLX5_IB_SRQ_H
      8
      9enum {
     10	MLX5_SRQ_FLAG_ERR    = (1 << 0),
     11	MLX5_SRQ_FLAG_WQ_SIG = (1 << 1),
     12	MLX5_SRQ_FLAG_RNDV   = (1 << 2),
     13};
     14
     15struct mlx5_srq_attr {
     16	u32 type;
     17	u32 flags;
     18	u32 log_size;
     19	u32 wqe_shift;
     20	u32 log_page_size;
     21	u32 wqe_cnt;
     22	u32 srqn;
     23	u32 xrcd;
     24	u32 page_offset;
     25	u32 cqn;
     26	u32 pd;
     27	u32 lwm;
     28	u32 user_index;
     29	u64 db_record;
     30	__be64 *pas;
     31	struct ib_umem *umem;
     32	u32 tm_log_list_size;
     33	u32 tm_next_tag;
     34	u32 tm_hw_phase_cnt;
     35	u32 tm_sw_phase_cnt;
     36	u16 uid;
     37};
     38
     39struct mlx5_ib_dev;
     40
     41struct mlx5_core_srq {
     42	struct mlx5_core_rsc_common common; /* must be first */
     43	u32 srqn;
     44	int max;
     45	size_t max_gs;
     46	size_t max_avail_gather;
     47	int wqe_shift;
     48	void (*event)(struct mlx5_core_srq *srq, enum mlx5_event e);
     49
     50	u16 uid;
     51};
     52
     53struct mlx5_srq_table {
     54	struct notifier_block nb;
     55	struct xarray array;
     56};
     57
     58int mlx5_cmd_create_srq(struct mlx5_ib_dev *dev, struct mlx5_core_srq *srq,
     59			struct mlx5_srq_attr *in);
     60int mlx5_cmd_destroy_srq(struct mlx5_ib_dev *dev, struct mlx5_core_srq *srq);
     61int mlx5_cmd_query_srq(struct mlx5_ib_dev *dev, struct mlx5_core_srq *srq,
     62		       struct mlx5_srq_attr *out);
     63int mlx5_cmd_arm_srq(struct mlx5_ib_dev *dev, struct mlx5_core_srq *srq,
     64		     u16 lwm, int is_srq);
     65struct mlx5_core_srq *mlx5_cmd_get_srq(struct mlx5_ib_dev *dev, u32 srqn);
     66
     67int mlx5_init_srq_table(struct mlx5_ib_dev *dev);
     68void mlx5_cleanup_srq_table(struct mlx5_ib_dev *dev);
     69#endif /* MLX5_IB_SRQ_H */