mthca_mr.c (17330B)
1/* 2 * Copyright (c) 2004 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34#include <linux/slab.h> 35#include <linux/errno.h> 36 37#include "mthca_dev.h" 38#include "mthca_cmd.h" 39#include "mthca_memfree.h" 40 41struct mthca_mtt { 42 struct mthca_buddy *buddy; 43 int order; 44 u32 first_seg; 45}; 46 47/* 48 * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits. 49 */ 50struct mthca_mpt_entry { 51 __be32 flags; 52 __be32 page_size; 53 __be32 key; 54 __be32 pd; 55 __be64 start; 56 __be64 length; 57 __be32 lkey; 58 __be32 window_count; 59 __be32 window_count_limit; 60 __be64 mtt_seg; 61 __be32 mtt_sz; /* Arbel only */ 62 u32 reserved[2]; 63} __packed; 64 65#define MTHCA_MPT_FLAG_SW_OWNS (0xfUL << 28) 66#define MTHCA_MPT_FLAG_MIO (1 << 17) 67#define MTHCA_MPT_FLAG_BIND_ENABLE (1 << 15) 68#define MTHCA_MPT_FLAG_PHYSICAL (1 << 9) 69#define MTHCA_MPT_FLAG_REGION (1 << 8) 70 71#define MTHCA_MTT_FLAG_PRESENT 1 72 73#define MTHCA_MPT_STATUS_SW 0xF0 74#define MTHCA_MPT_STATUS_HW 0x00 75 76#define SINAI_FMR_KEY_INC 0x1000000 77 78/* 79 * Buddy allocator for MTT segments (currently not very efficient 80 * since it doesn't keep a free list and just searches linearly 81 * through the bitmaps) 82 */ 83 84static u32 mthca_buddy_alloc(struct mthca_buddy *buddy, int order) 85{ 86 int o; 87 int m; 88 u32 seg; 89 90 spin_lock(&buddy->lock); 91 92 for (o = order; o <= buddy->max_order; ++o) 93 if (buddy->num_free[o]) { 94 m = 1 << (buddy->max_order - o); 95 seg = find_first_bit(buddy->bits[o], m); 96 if (seg < m) 97 goto found; 98 } 99 100 spin_unlock(&buddy->lock); 101 return -1; 102 103 found: 104 __clear_bit(seg, buddy->bits[o]); 105 --buddy->num_free[o]; 106 107 while (o > order) { 108 --o; 109 seg <<= 1; 110 __set_bit(seg ^ 1, buddy->bits[o]); 111 ++buddy->num_free[o]; 112 } 113 114 spin_unlock(&buddy->lock); 115 116 seg <<= order; 117 118 return seg; 119} 120 121static void mthca_buddy_free(struct mthca_buddy *buddy, u32 seg, int order) 122{ 123 seg >>= order; 124 125 spin_lock(&buddy->lock); 126 127 while (test_bit(seg ^ 1, buddy->bits[order])) { 128 __clear_bit(seg ^ 1, buddy->bits[order]); 129 --buddy->num_free[order]; 130 seg >>= 1; 131 ++order; 132 } 133 134 __set_bit(seg, buddy->bits[order]); 135 ++buddy->num_free[order]; 136 137 spin_unlock(&buddy->lock); 138} 139 140static int mthca_buddy_init(struct mthca_buddy *buddy, int max_order) 141{ 142 int i; 143 144 buddy->max_order = max_order; 145 spin_lock_init(&buddy->lock); 146 147 buddy->bits = kcalloc(buddy->max_order + 1, sizeof(long *), 148 GFP_KERNEL); 149 buddy->num_free = kcalloc((buddy->max_order + 1), sizeof *buddy->num_free, 150 GFP_KERNEL); 151 if (!buddy->bits || !buddy->num_free) 152 goto err_out; 153 154 for (i = 0; i <= buddy->max_order; ++i) { 155 buddy->bits[i] = bitmap_zalloc(1 << (buddy->max_order - i), 156 GFP_KERNEL); 157 if (!buddy->bits[i]) 158 goto err_out_free; 159 } 160 161 __set_bit(0, buddy->bits[buddy->max_order]); 162 buddy->num_free[buddy->max_order] = 1; 163 164 return 0; 165 166err_out_free: 167 for (i = 0; i <= buddy->max_order; ++i) 168 bitmap_free(buddy->bits[i]); 169 170err_out: 171 kfree(buddy->bits); 172 kfree(buddy->num_free); 173 174 return -ENOMEM; 175} 176 177static void mthca_buddy_cleanup(struct mthca_buddy *buddy) 178{ 179 int i; 180 181 for (i = 0; i <= buddy->max_order; ++i) 182 bitmap_free(buddy->bits[i]); 183 184 kfree(buddy->bits); 185 kfree(buddy->num_free); 186} 187 188static u32 mthca_alloc_mtt_range(struct mthca_dev *dev, int order, 189 struct mthca_buddy *buddy) 190{ 191 u32 seg = mthca_buddy_alloc(buddy, order); 192 193 if (seg == -1) 194 return -1; 195 196 if (mthca_is_memfree(dev)) 197 if (mthca_table_get_range(dev, dev->mr_table.mtt_table, seg, 198 seg + (1 << order) - 1)) { 199 mthca_buddy_free(buddy, seg, order); 200 seg = -1; 201 } 202 203 return seg; 204} 205 206static struct mthca_mtt *__mthca_alloc_mtt(struct mthca_dev *dev, int size, 207 struct mthca_buddy *buddy) 208{ 209 struct mthca_mtt *mtt; 210 int i; 211 212 if (size <= 0) 213 return ERR_PTR(-EINVAL); 214 215 mtt = kmalloc(sizeof *mtt, GFP_KERNEL); 216 if (!mtt) 217 return ERR_PTR(-ENOMEM); 218 219 mtt->buddy = buddy; 220 mtt->order = 0; 221 for (i = dev->limits.mtt_seg_size / 8; i < size; i <<= 1) 222 ++mtt->order; 223 224 mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy); 225 if (mtt->first_seg == -1) { 226 kfree(mtt); 227 return ERR_PTR(-ENOMEM); 228 } 229 230 return mtt; 231} 232 233struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size) 234{ 235 return __mthca_alloc_mtt(dev, size, &dev->mr_table.mtt_buddy); 236} 237 238void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt) 239{ 240 if (!mtt) 241 return; 242 243 mthca_buddy_free(mtt->buddy, mtt->first_seg, mtt->order); 244 245 mthca_table_put_range(dev, dev->mr_table.mtt_table, 246 mtt->first_seg, 247 mtt->first_seg + (1 << mtt->order) - 1); 248 249 kfree(mtt); 250} 251 252static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, 253 int start_index, u64 *buffer_list, int list_len) 254{ 255 struct mthca_mailbox *mailbox; 256 __be64 *mtt_entry; 257 int err = 0; 258 int i; 259 260 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); 261 if (IS_ERR(mailbox)) 262 return PTR_ERR(mailbox); 263 mtt_entry = mailbox->buf; 264 265 while (list_len > 0) { 266 mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base + 267 mtt->first_seg * dev->limits.mtt_seg_size + 268 start_index * 8); 269 mtt_entry[1] = 0; 270 for (i = 0; i < list_len && i < MTHCA_MAILBOX_SIZE / 8 - 2; ++i) 271 mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] | 272 MTHCA_MTT_FLAG_PRESENT); 273 274 /* 275 * If we have an odd number of entries to write, add 276 * one more dummy entry for firmware efficiency. 277 */ 278 if (i & 1) 279 mtt_entry[i + 2] = 0; 280 281 err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1); 282 if (err) { 283 mthca_warn(dev, "WRITE_MTT failed (%d)\n", err); 284 goto out; 285 } 286 287 list_len -= i; 288 start_index += i; 289 buffer_list += i; 290 } 291 292out: 293 mthca_free_mailbox(dev, mailbox); 294 return err; 295} 296 297int mthca_write_mtt_size(struct mthca_dev *dev) 298{ 299 if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy || 300 !(dev->mthca_flags & MTHCA_FLAG_FMR)) 301 /* 302 * Be friendly to WRITE_MTT command 303 * and leave two empty slots for the 304 * index and reserved fields of the 305 * mailbox. 306 */ 307 return PAGE_SIZE / sizeof (u64) - 2; 308 309 /* For Arbel, all MTTs must fit in the same page. */ 310 return mthca_is_memfree(dev) ? (PAGE_SIZE / sizeof (u64)) : 0x7ffffff; 311} 312 313static void mthca_tavor_write_mtt_seg(struct mthca_dev *dev, 314 struct mthca_mtt *mtt, int start_index, 315 u64 *buffer_list, int list_len) 316{ 317 u64 __iomem *mtts; 318 int i; 319 320 mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * dev->limits.mtt_seg_size + 321 start_index * sizeof (u64); 322 for (i = 0; i < list_len; ++i) 323 mthca_write64_raw(cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT), 324 mtts + i); 325} 326 327static void mthca_arbel_write_mtt_seg(struct mthca_dev *dev, 328 struct mthca_mtt *mtt, int start_index, 329 u64 *buffer_list, int list_len) 330{ 331 __be64 *mtts; 332 dma_addr_t dma_handle; 333 int i; 334 int s = start_index * sizeof (u64); 335 336 /* For Arbel, all MTTs must fit in the same page. */ 337 BUG_ON(s / PAGE_SIZE != (s + list_len * sizeof(u64) - 1) / PAGE_SIZE); 338 /* Require full segments */ 339 BUG_ON(s % dev->limits.mtt_seg_size); 340 341 mtts = mthca_table_find(dev->mr_table.mtt_table, mtt->first_seg + 342 s / dev->limits.mtt_seg_size, &dma_handle); 343 344 BUG_ON(!mtts); 345 346 dma_sync_single_for_cpu(&dev->pdev->dev, dma_handle, 347 list_len * sizeof (u64), DMA_TO_DEVICE); 348 349 for (i = 0; i < list_len; ++i) 350 mtts[i] = cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT); 351 352 dma_sync_single_for_device(&dev->pdev->dev, dma_handle, 353 list_len * sizeof (u64), DMA_TO_DEVICE); 354} 355 356int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, 357 int start_index, u64 *buffer_list, int list_len) 358{ 359 int size = mthca_write_mtt_size(dev); 360 int chunk; 361 362 if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy || 363 !(dev->mthca_flags & MTHCA_FLAG_FMR)) 364 return __mthca_write_mtt(dev, mtt, start_index, buffer_list, list_len); 365 366 while (list_len > 0) { 367 chunk = min(size, list_len); 368 if (mthca_is_memfree(dev)) 369 mthca_arbel_write_mtt_seg(dev, mtt, start_index, 370 buffer_list, chunk); 371 else 372 mthca_tavor_write_mtt_seg(dev, mtt, start_index, 373 buffer_list, chunk); 374 375 list_len -= chunk; 376 start_index += chunk; 377 buffer_list += chunk; 378 } 379 380 return 0; 381} 382 383static inline u32 tavor_hw_index_to_key(u32 ind) 384{ 385 return ind; 386} 387 388static inline u32 tavor_key_to_hw_index(u32 key) 389{ 390 return key; 391} 392 393static inline u32 arbel_hw_index_to_key(u32 ind) 394{ 395 return (ind >> 24) | (ind << 8); 396} 397 398static inline u32 arbel_key_to_hw_index(u32 key) 399{ 400 return (key << 24) | (key >> 8); 401} 402 403static inline u32 hw_index_to_key(struct mthca_dev *dev, u32 ind) 404{ 405 if (mthca_is_memfree(dev)) 406 return arbel_hw_index_to_key(ind); 407 else 408 return tavor_hw_index_to_key(ind); 409} 410 411static inline u32 key_to_hw_index(struct mthca_dev *dev, u32 key) 412{ 413 if (mthca_is_memfree(dev)) 414 return arbel_key_to_hw_index(key); 415 else 416 return tavor_key_to_hw_index(key); 417} 418 419static inline u32 adjust_key(struct mthca_dev *dev, u32 key) 420{ 421 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 422 return ((key << 20) & 0x800000) | (key & 0x7fffff); 423 else 424 return key; 425} 426 427int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift, 428 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr) 429{ 430 struct mthca_mailbox *mailbox; 431 struct mthca_mpt_entry *mpt_entry; 432 u32 key; 433 int i; 434 int err; 435 436 WARN_ON(buffer_size_shift >= 32); 437 438 key = mthca_alloc(&dev->mr_table.mpt_alloc); 439 if (key == -1) 440 return -ENOMEM; 441 key = adjust_key(dev, key); 442 mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key); 443 444 if (mthca_is_memfree(dev)) { 445 err = mthca_table_get(dev, dev->mr_table.mpt_table, key); 446 if (err) 447 goto err_out_mpt_free; 448 } 449 450 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); 451 if (IS_ERR(mailbox)) { 452 err = PTR_ERR(mailbox); 453 goto err_out_table; 454 } 455 mpt_entry = mailbox->buf; 456 457 mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS | 458 MTHCA_MPT_FLAG_MIO | 459 MTHCA_MPT_FLAG_REGION | 460 access); 461 if (!mr->mtt) 462 mpt_entry->flags |= cpu_to_be32(MTHCA_MPT_FLAG_PHYSICAL); 463 464 mpt_entry->page_size = cpu_to_be32(buffer_size_shift - 12); 465 mpt_entry->key = cpu_to_be32(key); 466 mpt_entry->pd = cpu_to_be32(pd); 467 mpt_entry->start = cpu_to_be64(iova); 468 mpt_entry->length = cpu_to_be64(total_size); 469 470 memset_startat(mpt_entry, 0, lkey); 471 472 if (mr->mtt) 473 mpt_entry->mtt_seg = 474 cpu_to_be64(dev->mr_table.mtt_base + 475 mr->mtt->first_seg * dev->limits.mtt_seg_size); 476 477 if (0) { 478 mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey); 479 for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) { 480 if (i % 4 == 0) 481 printk("[%02x] ", i * 4); 482 printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i])); 483 if ((i + 1) % 4 == 0) 484 printk("\n"); 485 } 486 } 487 488 err = mthca_SW2HW_MPT(dev, mailbox, 489 key & (dev->limits.num_mpts - 1)); 490 if (err) { 491 mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err); 492 goto err_out_mailbox; 493 } 494 495 mthca_free_mailbox(dev, mailbox); 496 return err; 497 498err_out_mailbox: 499 mthca_free_mailbox(dev, mailbox); 500 501err_out_table: 502 mthca_table_put(dev, dev->mr_table.mpt_table, key); 503 504err_out_mpt_free: 505 mthca_free(&dev->mr_table.mpt_alloc, key); 506 return err; 507} 508 509int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd, 510 u32 access, struct mthca_mr *mr) 511{ 512 mr->mtt = NULL; 513 return mthca_mr_alloc(dev, pd, 12, 0, ~0ULL, access, mr); 514} 515 516int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd, 517 u64 *buffer_list, int buffer_size_shift, 518 int list_len, u64 iova, u64 total_size, 519 u32 access, struct mthca_mr *mr) 520{ 521 int err; 522 523 mr->mtt = mthca_alloc_mtt(dev, list_len); 524 if (IS_ERR(mr->mtt)) 525 return PTR_ERR(mr->mtt); 526 527 err = mthca_write_mtt(dev, mr->mtt, 0, buffer_list, list_len); 528 if (err) { 529 mthca_free_mtt(dev, mr->mtt); 530 return err; 531 } 532 533 err = mthca_mr_alloc(dev, pd, buffer_size_shift, iova, 534 total_size, access, mr); 535 if (err) 536 mthca_free_mtt(dev, mr->mtt); 537 538 return err; 539} 540 541/* Free mr */ 542static void mthca_free_region(struct mthca_dev *dev, u32 lkey) 543{ 544 mthca_table_put(dev, dev->mr_table.mpt_table, 545 key_to_hw_index(dev, lkey)); 546 547 mthca_free(&dev->mr_table.mpt_alloc, key_to_hw_index(dev, lkey)); 548} 549 550void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr) 551{ 552 int err; 553 554 err = mthca_HW2SW_MPT(dev, NULL, 555 key_to_hw_index(dev, mr->ibmr.lkey) & 556 (dev->limits.num_mpts - 1)); 557 if (err) 558 mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err); 559 560 mthca_free_region(dev, mr->ibmr.lkey); 561 mthca_free_mtt(dev, mr->mtt); 562} 563 564int mthca_init_mr_table(struct mthca_dev *dev) 565{ 566 phys_addr_t addr; 567 int mpts, mtts, err, i; 568 569 err = mthca_alloc_init(&dev->mr_table.mpt_alloc, 570 dev->limits.num_mpts, 571 ~0, dev->limits.reserved_mrws); 572 if (err) 573 return err; 574 575 if (!mthca_is_memfree(dev) && 576 (dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) 577 dev->limits.fmr_reserved_mtts = 0; 578 else 579 dev->mthca_flags |= MTHCA_FLAG_FMR; 580 581 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 582 mthca_dbg(dev, "Memory key throughput optimization activated.\n"); 583 584 err = mthca_buddy_init(&dev->mr_table.mtt_buddy, 585 fls(dev->limits.num_mtt_segs - 1)); 586 587 if (err) 588 goto err_mtt_buddy; 589 590 dev->mr_table.tavor_fmr.mpt_base = NULL; 591 dev->mr_table.tavor_fmr.mtt_base = NULL; 592 593 if (dev->limits.fmr_reserved_mtts) { 594 i = fls(dev->limits.fmr_reserved_mtts - 1); 595 596 if (i >= 31) { 597 mthca_warn(dev, "Unable to reserve 2^31 FMR MTTs.\n"); 598 err = -EINVAL; 599 goto err_fmr_mpt; 600 } 601 mpts = mtts = 1 << i; 602 } else { 603 mtts = dev->limits.num_mtt_segs; 604 mpts = dev->limits.num_mpts; 605 } 606 607 if (!mthca_is_memfree(dev) && 608 (dev->mthca_flags & MTHCA_FLAG_FMR)) { 609 610 addr = pci_resource_start(dev->pdev, 4) + 611 ((pci_resource_len(dev->pdev, 4) - 1) & 612 dev->mr_table.mpt_base); 613 614 dev->mr_table.tavor_fmr.mpt_base = 615 ioremap(addr, mpts * sizeof(struct mthca_mpt_entry)); 616 617 if (!dev->mr_table.tavor_fmr.mpt_base) { 618 mthca_warn(dev, "MPT ioremap for FMR failed.\n"); 619 err = -ENOMEM; 620 goto err_fmr_mpt; 621 } 622 623 addr = pci_resource_start(dev->pdev, 4) + 624 ((pci_resource_len(dev->pdev, 4) - 1) & 625 dev->mr_table.mtt_base); 626 627 dev->mr_table.tavor_fmr.mtt_base = 628 ioremap(addr, mtts * dev->limits.mtt_seg_size); 629 if (!dev->mr_table.tavor_fmr.mtt_base) { 630 mthca_warn(dev, "MTT ioremap for FMR failed.\n"); 631 err = -ENOMEM; 632 goto err_fmr_mtt; 633 } 634 } 635 636 if (dev->limits.fmr_reserved_mtts) { 637 err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, fls(mtts - 1)); 638 if (err) 639 goto err_fmr_mtt_buddy; 640 641 /* Prevent regular MRs from using FMR keys */ 642 err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, fls(mtts - 1)); 643 if (err) 644 goto err_reserve_fmr; 645 646 dev->mr_table.fmr_mtt_buddy = 647 &dev->mr_table.tavor_fmr.mtt_buddy; 648 } else 649 dev->mr_table.fmr_mtt_buddy = &dev->mr_table.mtt_buddy; 650 651 /* FMR table is always the first, take reserved MTTs out of there */ 652 if (dev->limits.reserved_mtts) { 653 i = fls(dev->limits.reserved_mtts - 1); 654 655 if (mthca_alloc_mtt_range(dev, i, 656 dev->mr_table.fmr_mtt_buddy) == -1) { 657 mthca_warn(dev, "MTT table of order %d is too small.\n", 658 dev->mr_table.fmr_mtt_buddy->max_order); 659 err = -ENOMEM; 660 goto err_reserve_mtts; 661 } 662 } 663 664 return 0; 665 666err_reserve_mtts: 667err_reserve_fmr: 668 if (dev->limits.fmr_reserved_mtts) 669 mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy); 670 671err_fmr_mtt_buddy: 672 if (dev->mr_table.tavor_fmr.mtt_base) 673 iounmap(dev->mr_table.tavor_fmr.mtt_base); 674 675err_fmr_mtt: 676 if (dev->mr_table.tavor_fmr.mpt_base) 677 iounmap(dev->mr_table.tavor_fmr.mpt_base); 678 679err_fmr_mpt: 680 mthca_buddy_cleanup(&dev->mr_table.mtt_buddy); 681 682err_mtt_buddy: 683 mthca_alloc_cleanup(&dev->mr_table.mpt_alloc); 684 685 return err; 686} 687 688void mthca_cleanup_mr_table(struct mthca_dev *dev) 689{ 690 /* XXX check if any MRs are still allocated? */ 691 if (dev->limits.fmr_reserved_mtts) 692 mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy); 693 694 mthca_buddy_cleanup(&dev->mr_table.mtt_buddy); 695 696 if (dev->mr_table.tavor_fmr.mtt_base) 697 iounmap(dev->mr_table.tavor_fmr.mtt_base); 698 if (dev->mr_table.tavor_fmr.mpt_base) 699 iounmap(dev->mr_table.tavor_fmr.mpt_base); 700 701 mthca_alloc_cleanup(&dev->mr_table.mpt_alloc); 702}