cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qedr_roce_cm.h (2401B)

      1/* QLogic qedr NIC Driver
      2 * Copyright (c) 2015-2016  QLogic Corporation
      3 *
      4 * This software is available to you under a choice of one of two
      5 * licenses.  You may choose to be licensed under the terms of the GNU
      6 * General Public License (GPL) Version 2, available from the file
      7 * COPYING in the main directory of this source tree, or the
      8 * OpenIB.org BSD license below:
      9 *
     10 *     Redistribution and use in source and binary forms, with or
     11 *     without modification, are permitted provided that the following
     12 *     conditions are met:
     13 *
     14 *      - Redistributions of source code must retain the above
     15 *        copyright notice, this list of conditions and the following
     16 *        disclaimer.
     17 *
     18 *      - Redistributions in binary form must reproduce the above
     19 *        copyright notice, this list of conditions and the following
     20 *        disclaimer in the documentation and /or other materials
     21 *        provided with the distribution.
     22 *
     23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
     27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
     28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
     29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     30 * SOFTWARE.
     31 */
     32#ifndef LINUX_QEDR_CM_H_
     33#define LINUX_QEDR_CM_H_
     34
     35#define QEDR_GSI_MAX_RECV_WR	(4096)
     36#define QEDR_GSI_MAX_SEND_WR	(4096)
     37
     38#define QEDR_GSI_MAX_RECV_SGE	(1)	/* LL2 FW limitation */
     39
     40#define QEDR_ROCE_V2_UDP_SPORT	(0000)
     41
     42static inline u32 qedr_get_ipv4_from_gid(const u8 *gid)
     43{
     44	return *(u32 *)(void *)&gid[12];
     45}
     46
     47/* RDMA CM */
     48int qedr_gsi_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
     49int qedr_gsi_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
     50		       const struct ib_recv_wr **bad_wr);
     51int qedr_gsi_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
     52		       const struct ib_send_wr **bad_wr);
     53int qedr_create_gsi_qp(struct qedr_dev *dev, struct ib_qp_init_attr *attrs,
     54		       struct qedr_qp *qp);
     55void qedr_store_gsi_qp_cq(struct qedr_dev *dev,
     56			  struct qedr_qp *qp, struct ib_qp_init_attr *attrs);
     57int qedr_destroy_gsi_qp(struct qedr_dev *dev);
     58void qedr_inc_sw_gsi_cons(struct qedr_qp_hwq_info *info);
     59#endif