cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

imx6ul_tsc.c (14081B)


      1// SPDX-License-Identifier: GPL-2.0
      2//
      3// Freescale i.MX6UL touchscreen controller driver
      4//
      5// Copyright (C) 2015 Freescale Semiconductor, Inc.
      6
      7#include <linux/errno.h>
      8#include <linux/kernel.h>
      9#include <linux/module.h>
     10#include <linux/gpio/consumer.h>
     11#include <linux/input.h>
     12#include <linux/slab.h>
     13#include <linux/completion.h>
     14#include <linux/delay.h>
     15#include <linux/of.h>
     16#include <linux/interrupt.h>
     17#include <linux/platform_device.h>
     18#include <linux/clk.h>
     19#include <linux/io.h>
     20#include <linux/log2.h>
     21
     22/* ADC configuration registers field define */
     23#define ADC_AIEN		(0x1 << 7)
     24#define ADC_CONV_DISABLE	0x1F
     25#define ADC_AVGE		(0x1 << 5)
     26#define ADC_CAL			(0x1 << 7)
     27#define ADC_CALF		0x2
     28#define ADC_12BIT_MODE		(0x2 << 2)
     29#define ADC_CONV_MODE_MASK	(0x3 << 2)
     30#define ADC_IPG_CLK		0x00
     31#define ADC_INPUT_CLK_MASK	0x3
     32#define ADC_CLK_DIV_8		(0x03 << 5)
     33#define ADC_CLK_DIV_MASK	(0x3 << 5)
     34#define ADC_SHORT_SAMPLE_MODE	(0x0 << 4)
     35#define ADC_SAMPLE_MODE_MASK	(0x1 << 4)
     36#define ADC_HARDWARE_TRIGGER	(0x1 << 13)
     37#define ADC_AVGS_SHIFT		14
     38#define ADC_AVGS_MASK		(0x3 << 14)
     39#define SELECT_CHANNEL_4	0x04
     40#define SELECT_CHANNEL_1	0x01
     41#define DISABLE_CONVERSION_INT	(0x0 << 7)
     42
     43/* ADC registers */
     44#define REG_ADC_HC0		0x00
     45#define REG_ADC_HC1		0x04
     46#define REG_ADC_HC2		0x08
     47#define REG_ADC_HC3		0x0C
     48#define REG_ADC_HC4		0x10
     49#define REG_ADC_HS		0x14
     50#define REG_ADC_R0		0x18
     51#define REG_ADC_CFG		0x2C
     52#define REG_ADC_GC		0x30
     53#define REG_ADC_GS		0x34
     54
     55#define ADC_TIMEOUT		msecs_to_jiffies(100)
     56
     57/* TSC registers */
     58#define REG_TSC_BASIC_SETING	0x00
     59#define REG_TSC_PRE_CHARGE_TIME	0x10
     60#define REG_TSC_FLOW_CONTROL	0x20
     61#define REG_TSC_MEASURE_VALUE	0x30
     62#define REG_TSC_INT_EN		0x40
     63#define REG_TSC_INT_SIG_EN	0x50
     64#define REG_TSC_INT_STATUS	0x60
     65#define REG_TSC_DEBUG_MODE	0x70
     66#define REG_TSC_DEBUG_MODE2	0x80
     67
     68/* TSC configuration registers field define */
     69#define DETECT_4_WIRE_MODE	(0x0 << 4)
     70#define AUTO_MEASURE		0x1
     71#define MEASURE_SIGNAL		0x1
     72#define DETECT_SIGNAL		(0x1 << 4)
     73#define VALID_SIGNAL		(0x1 << 8)
     74#define MEASURE_INT_EN		0x1
     75#define MEASURE_SIG_EN		0x1
     76#define VALID_SIG_EN		(0x1 << 8)
     77#define DE_GLITCH_2		(0x2 << 29)
     78#define START_SENSE		(0x1 << 12)
     79#define TSC_DISABLE		(0x1 << 16)
     80#define DETECT_MODE		0x2
     81
     82struct imx6ul_tsc {
     83	struct device *dev;
     84	struct input_dev *input;
     85	void __iomem *tsc_regs;
     86	void __iomem *adc_regs;
     87	struct clk *tsc_clk;
     88	struct clk *adc_clk;
     89	struct gpio_desc *xnur_gpio;
     90
     91	u32 measure_delay_time;
     92	u32 pre_charge_time;
     93	bool average_enable;
     94	u32 average_select;
     95
     96	struct completion completion;
     97};
     98
     99/*
    100 * TSC module need ADC to get the measure value. So
    101 * before config TSC, we should initialize ADC module.
    102 */
    103static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
    104{
    105	u32 adc_hc = 0;
    106	u32 adc_gc;
    107	u32 adc_gs;
    108	u32 adc_cfg;
    109	unsigned long timeout;
    110
    111	reinit_completion(&tsc->completion);
    112
    113	adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
    114	adc_cfg &= ~(ADC_CONV_MODE_MASK | ADC_INPUT_CLK_MASK);
    115	adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
    116	adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE_MASK);
    117	adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
    118	if (tsc->average_enable) {
    119		adc_cfg &= ~ADC_AVGS_MASK;
    120		adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT;
    121	}
    122	adc_cfg &= ~ADC_HARDWARE_TRIGGER;
    123	writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
    124
    125	/* enable calibration interrupt */
    126	adc_hc |= ADC_AIEN;
    127	adc_hc |= ADC_CONV_DISABLE;
    128	writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
    129
    130	/* start ADC calibration */
    131	adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
    132	adc_gc |= ADC_CAL;
    133	if (tsc->average_enable)
    134		adc_gc |= ADC_AVGE;
    135	writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
    136
    137	timeout = wait_for_completion_timeout
    138			(&tsc->completion, ADC_TIMEOUT);
    139	if (timeout == 0) {
    140		dev_err(tsc->dev, "Timeout for adc calibration\n");
    141		return -ETIMEDOUT;
    142	}
    143
    144	adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
    145	if (adc_gs & ADC_CALF) {
    146		dev_err(tsc->dev, "ADC calibration failed\n");
    147		return -EINVAL;
    148	}
    149
    150	/* TSC need the ADC work in hardware trigger */
    151	adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
    152	adc_cfg |= ADC_HARDWARE_TRIGGER;
    153	writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
    154
    155	return 0;
    156}
    157
    158/*
    159 * This is a TSC workaround. Currently TSC misconnect two
    160 * ADC channels, this function remap channel configure for
    161 * hardware trigger.
    162 */
    163static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
    164{
    165	u32 adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4;
    166
    167	adc_hc0 = DISABLE_CONVERSION_INT;
    168	writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
    169
    170	adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4;
    171	writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
    172
    173	adc_hc2 = DISABLE_CONVERSION_INT;
    174	writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
    175
    176	adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1;
    177	writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
    178
    179	adc_hc4 = DISABLE_CONVERSION_INT;
    180	writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
    181}
    182
    183/*
    184 * TSC setting, confige the pre-charge time and measure delay time.
    185 * different touch screen may need different pre-charge time and
    186 * measure delay time.
    187 */
    188static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
    189{
    190	u32 basic_setting = 0;
    191	u32 start;
    192
    193	basic_setting |= tsc->measure_delay_time << 8;
    194	basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
    195	writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
    196
    197	writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
    198
    199	writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
    200	writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
    201	writel(MEASURE_SIG_EN | VALID_SIG_EN,
    202		tsc->tsc_regs + REG_TSC_INT_SIG_EN);
    203
    204	/* start sense detection */
    205	start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
    206	start |= START_SENSE;
    207	start &= ~TSC_DISABLE;
    208	writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
    209}
    210
    211static int imx6ul_tsc_init(struct imx6ul_tsc *tsc)
    212{
    213	int err;
    214
    215	err = imx6ul_adc_init(tsc);
    216	if (err)
    217		return err;
    218	imx6ul_tsc_channel_config(tsc);
    219	imx6ul_tsc_set(tsc);
    220
    221	return 0;
    222}
    223
    224static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc)
    225{
    226	u32 tsc_flow;
    227	u32 adc_cfg;
    228
    229	/* TSC controller enters to idle status */
    230	tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
    231	tsc_flow |= TSC_DISABLE;
    232	writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
    233
    234	/* ADC controller enters to stop mode */
    235	adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
    236	adc_cfg |= ADC_CONV_DISABLE;
    237	writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0);
    238}
    239
    240/* Delay some time (max 2ms), wait the pre-charge done. */
    241static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
    242{
    243	unsigned long timeout = jiffies + msecs_to_jiffies(2);
    244	u32 state_machine;
    245	u32 debug_mode2;
    246
    247	do {
    248		if (time_after(jiffies, timeout))
    249			return false;
    250
    251		usleep_range(200, 400);
    252		debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
    253		state_machine = (debug_mode2 >> 20) & 0x7;
    254	} while (state_machine != DETECT_MODE);
    255
    256	usleep_range(200, 400);
    257	return true;
    258}
    259
    260static irqreturn_t tsc_irq_fn(int irq, void *dev_id)
    261{
    262	struct imx6ul_tsc *tsc = dev_id;
    263	u32 status;
    264	u32 value;
    265	u32 x, y;
    266	u32 start;
    267
    268	status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
    269
    270	/* write 1 to clear the bit measure-signal */
    271	writel(MEASURE_SIGNAL | DETECT_SIGNAL,
    272		tsc->tsc_regs + REG_TSC_INT_STATUS);
    273
    274	/* It's a HW self-clean bit. Set this bit and start sense detection */
    275	start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
    276	start |= START_SENSE;
    277	writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
    278
    279	if (status & MEASURE_SIGNAL) {
    280		value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
    281		x = (value >> 16) & 0x0fff;
    282		y = value & 0x0fff;
    283
    284		/*
    285		 * In detect mode, we can get the xnur gpio value,
    286		 * otherwise assume contact is stiull active.
    287		 */
    288		if (!tsc_wait_detect_mode(tsc) ||
    289		    gpiod_get_value_cansleep(tsc->xnur_gpio)) {
    290			input_report_key(tsc->input, BTN_TOUCH, 1);
    291			input_report_abs(tsc->input, ABS_X, x);
    292			input_report_abs(tsc->input, ABS_Y, y);
    293		} else {
    294			input_report_key(tsc->input, BTN_TOUCH, 0);
    295		}
    296
    297		input_sync(tsc->input);
    298	}
    299
    300	return IRQ_HANDLED;
    301}
    302
    303static irqreturn_t adc_irq_fn(int irq, void *dev_id)
    304{
    305	struct imx6ul_tsc *tsc = dev_id;
    306	u32 coco;
    307
    308	coco = readl(tsc->adc_regs + REG_ADC_HS);
    309	if (coco & 0x01) {
    310		readl(tsc->adc_regs + REG_ADC_R0);
    311		complete(&tsc->completion);
    312	}
    313
    314	return IRQ_HANDLED;
    315}
    316
    317static int imx6ul_tsc_start(struct imx6ul_tsc *tsc)
    318{
    319	int err;
    320
    321	err = clk_prepare_enable(tsc->adc_clk);
    322	if (err) {
    323		dev_err(tsc->dev,
    324			"Could not prepare or enable the adc clock: %d\n",
    325			err);
    326		return err;
    327	}
    328
    329	err = clk_prepare_enable(tsc->tsc_clk);
    330	if (err) {
    331		dev_err(tsc->dev,
    332			"Could not prepare or enable the tsc clock: %d\n",
    333			err);
    334		goto disable_adc_clk;
    335	}
    336
    337	err = imx6ul_tsc_init(tsc);
    338	if (err)
    339		goto disable_tsc_clk;
    340
    341	return 0;
    342
    343disable_tsc_clk:
    344	clk_disable_unprepare(tsc->tsc_clk);
    345disable_adc_clk:
    346	clk_disable_unprepare(tsc->adc_clk);
    347	return err;
    348}
    349
    350static void imx6ul_tsc_stop(struct imx6ul_tsc *tsc)
    351{
    352	imx6ul_tsc_disable(tsc);
    353
    354	clk_disable_unprepare(tsc->tsc_clk);
    355	clk_disable_unprepare(tsc->adc_clk);
    356}
    357
    358
    359static int imx6ul_tsc_open(struct input_dev *input_dev)
    360{
    361	struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
    362
    363	return imx6ul_tsc_start(tsc);
    364}
    365
    366static void imx6ul_tsc_close(struct input_dev *input_dev)
    367{
    368	struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
    369
    370	imx6ul_tsc_stop(tsc);
    371}
    372
    373static int imx6ul_tsc_probe(struct platform_device *pdev)
    374{
    375	struct device_node *np = pdev->dev.of_node;
    376	struct imx6ul_tsc *tsc;
    377	struct input_dev *input_dev;
    378	int err;
    379	int tsc_irq;
    380	int adc_irq;
    381	u32 average_samples;
    382
    383	tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL);
    384	if (!tsc)
    385		return -ENOMEM;
    386
    387	input_dev = devm_input_allocate_device(&pdev->dev);
    388	if (!input_dev)
    389		return -ENOMEM;
    390
    391	input_dev->name = "iMX6UL Touchscreen Controller";
    392	input_dev->id.bustype = BUS_HOST;
    393
    394	input_dev->open = imx6ul_tsc_open;
    395	input_dev->close = imx6ul_tsc_close;
    396
    397	input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
    398	input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0);
    399	input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0);
    400
    401	input_set_drvdata(input_dev, tsc);
    402
    403	tsc->dev = &pdev->dev;
    404	tsc->input = input_dev;
    405	init_completion(&tsc->completion);
    406
    407	tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN);
    408	if (IS_ERR(tsc->xnur_gpio)) {
    409		err = PTR_ERR(tsc->xnur_gpio);
    410		dev_err(&pdev->dev,
    411			"failed to request GPIO tsc_X- (xnur): %d\n", err);
    412		return err;
    413	}
    414
    415	tsc->tsc_regs = devm_platform_ioremap_resource(pdev, 0);
    416	if (IS_ERR(tsc->tsc_regs)) {
    417		err = PTR_ERR(tsc->tsc_regs);
    418		dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err);
    419		return err;
    420	}
    421
    422	tsc->adc_regs = devm_platform_ioremap_resource(pdev, 1);
    423	if (IS_ERR(tsc->adc_regs)) {
    424		err = PTR_ERR(tsc->adc_regs);
    425		dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err);
    426		return err;
    427	}
    428
    429	tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc");
    430	if (IS_ERR(tsc->tsc_clk)) {
    431		err = PTR_ERR(tsc->tsc_clk);
    432		dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err);
    433		return err;
    434	}
    435
    436	tsc->adc_clk = devm_clk_get(&pdev->dev, "adc");
    437	if (IS_ERR(tsc->adc_clk)) {
    438		err = PTR_ERR(tsc->adc_clk);
    439		dev_err(&pdev->dev, "failed getting adc clock: %d\n", err);
    440		return err;
    441	}
    442
    443	tsc_irq = platform_get_irq(pdev, 0);
    444	if (tsc_irq < 0)
    445		return tsc_irq;
    446
    447	adc_irq = platform_get_irq(pdev, 1);
    448	if (adc_irq < 0)
    449		return adc_irq;
    450
    451	err = devm_request_threaded_irq(tsc->dev, tsc_irq,
    452					NULL, tsc_irq_fn, IRQF_ONESHOT,
    453					dev_name(&pdev->dev), tsc);
    454	if (err) {
    455		dev_err(&pdev->dev,
    456			"failed requesting tsc irq %d: %d\n",
    457			tsc_irq, err);
    458		return err;
    459	}
    460
    461	err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0,
    462				dev_name(&pdev->dev), tsc);
    463	if (err) {
    464		dev_err(&pdev->dev,
    465			"failed requesting adc irq %d: %d\n",
    466			adc_irq, err);
    467		return err;
    468	}
    469
    470	err = of_property_read_u32(np, "measure-delay-time",
    471				   &tsc->measure_delay_time);
    472	if (err)
    473		tsc->measure_delay_time = 0xffff;
    474
    475	err = of_property_read_u32(np, "pre-charge-time",
    476				   &tsc->pre_charge_time);
    477	if (err)
    478		tsc->pre_charge_time = 0xfff;
    479
    480	err = of_property_read_u32(np, "touchscreen-average-samples",
    481				   &average_samples);
    482	if (err)
    483		average_samples = 1;
    484
    485	switch (average_samples) {
    486	case 1:
    487		tsc->average_enable = false;
    488		tsc->average_select = 0; /* value unused; initialize anyway */
    489		break;
    490	case 4:
    491	case 8:
    492	case 16:
    493	case 32:
    494		tsc->average_enable = true;
    495		tsc->average_select = ilog2(average_samples) - 2;
    496		break;
    497	default:
    498		dev_err(&pdev->dev,
    499			"touchscreen-average-samples (%u) must be 1, 4, 8, 16 or 32\n",
    500			average_samples);
    501		return -EINVAL;
    502	}
    503
    504	err = input_register_device(tsc->input);
    505	if (err) {
    506		dev_err(&pdev->dev,
    507			"failed to register input device: %d\n", err);
    508		return err;
    509	}
    510
    511	platform_set_drvdata(pdev, tsc);
    512	return 0;
    513}
    514
    515static int __maybe_unused imx6ul_tsc_suspend(struct device *dev)
    516{
    517	struct platform_device *pdev = to_platform_device(dev);
    518	struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
    519	struct input_dev *input_dev = tsc->input;
    520
    521	mutex_lock(&input_dev->mutex);
    522
    523	if (input_device_enabled(input_dev))
    524		imx6ul_tsc_stop(tsc);
    525
    526	mutex_unlock(&input_dev->mutex);
    527
    528	return 0;
    529}
    530
    531static int __maybe_unused imx6ul_tsc_resume(struct device *dev)
    532{
    533	struct platform_device *pdev = to_platform_device(dev);
    534	struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
    535	struct input_dev *input_dev = tsc->input;
    536	int retval = 0;
    537
    538	mutex_lock(&input_dev->mutex);
    539
    540	if (input_device_enabled(input_dev))
    541		retval = imx6ul_tsc_start(tsc);
    542
    543	mutex_unlock(&input_dev->mutex);
    544
    545	return retval;
    546}
    547
    548static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops,
    549			 imx6ul_tsc_suspend, imx6ul_tsc_resume);
    550
    551static const struct of_device_id imx6ul_tsc_match[] = {
    552	{ .compatible = "fsl,imx6ul-tsc", },
    553	{ /* sentinel */ }
    554};
    555MODULE_DEVICE_TABLE(of, imx6ul_tsc_match);
    556
    557static struct platform_driver imx6ul_tsc_driver = {
    558	.driver		= {
    559		.name	= "imx6ul-tsc",
    560		.of_match_table	= imx6ul_tsc_match,
    561		.pm	= &imx6ul_tsc_pm_ops,
    562	},
    563	.probe		= imx6ul_tsc_probe,
    564};
    565module_platform_driver(imx6ul_tsc_driver);
    566
    567MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>");
    568MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver");
    569MODULE_LICENSE("GPL v2");