cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx8mq.c (3499B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Interconnect framework driver for i.MX8MQ SoC
      4 *
      5 * Copyright (c) 2019-2020, NXP
      6 */
      7
      8#include <linux/module.h>
      9#include <linux/platform_device.h>
     10#include <linux/interconnect-provider.h>
     11#include <dt-bindings/interconnect/imx8mq.h>
     12
     13#include "imx.h"
     14
     15static const struct imx_icc_node_adj_desc imx8mq_dram_adj = {
     16	.bw_mul = 1,
     17	.bw_div = 4,
     18	.phandle_name = "fsl,ddrc",
     19};
     20
     21static const struct imx_icc_node_adj_desc imx8mq_noc_adj = {
     22	.bw_mul = 1,
     23	.bw_div = 4,
     24	.main_noc = true,
     25};
     26
     27/*
     28 * Describe bus masters, slaves and connections between them
     29 *
     30 * This is a simplified subset of the bus diagram, there are several other
     31 * PL301 nics which are skipped/merged into PL301_MAIN
     32 */
     33static struct imx_icc_node_desc nodes[] = {
     34	DEFINE_BUS_INTERCONNECT("NOC", IMX8MQ_ICN_NOC, &imx8mq_noc_adj,
     35			IMX8MQ_ICS_DRAM, IMX8MQ_ICN_MAIN),
     36
     37	DEFINE_BUS_SLAVE("DRAM", IMX8MQ_ICS_DRAM, &imx8mq_dram_adj),
     38	DEFINE_BUS_SLAVE("OCRAM", IMX8MQ_ICS_OCRAM, NULL),
     39	DEFINE_BUS_MASTER("A53", IMX8MQ_ICM_A53, IMX8MQ_ICN_NOC),
     40
     41	/* VPUMIX */
     42	DEFINE_BUS_MASTER("VPU", IMX8MQ_ICM_VPU, IMX8MQ_ICN_VIDEO),
     43	DEFINE_BUS_INTERCONNECT("PL301_VIDEO", IMX8MQ_ICN_VIDEO, NULL, IMX8MQ_ICN_NOC),
     44
     45	/* GPUMIX */
     46	DEFINE_BUS_MASTER("GPU", IMX8MQ_ICM_GPU, IMX8MQ_ICN_GPU),
     47	DEFINE_BUS_INTERCONNECT("PL301_GPU", IMX8MQ_ICN_GPU, NULL, IMX8MQ_ICN_NOC),
     48
     49	/* DISPMIX (only for DCSS) */
     50	DEFINE_BUS_MASTER("DC", IMX8MQ_ICM_DCSS, IMX8MQ_ICN_DCSS),
     51	DEFINE_BUS_INTERCONNECT("PL301_DC", IMX8MQ_ICN_DCSS, NULL, IMX8MQ_ICN_NOC),
     52
     53	/* USBMIX */
     54	DEFINE_BUS_MASTER("USB1", IMX8MQ_ICM_USB1, IMX8MQ_ICN_USB),
     55	DEFINE_BUS_MASTER("USB2", IMX8MQ_ICM_USB2, IMX8MQ_ICN_USB),
     56	DEFINE_BUS_INTERCONNECT("PL301_USB", IMX8MQ_ICN_USB, NULL, IMX8MQ_ICN_NOC),
     57
     58	/* PL301_DISPLAY (IPs other than DCSS, inside SUPERMIX) */
     59	DEFINE_BUS_MASTER("CSI1", IMX8MQ_ICM_CSI1, IMX8MQ_ICN_DISPLAY),
     60	DEFINE_BUS_MASTER("CSI2", IMX8MQ_ICM_CSI2, IMX8MQ_ICN_DISPLAY),
     61	DEFINE_BUS_MASTER("LCDIF", IMX8MQ_ICM_LCDIF, IMX8MQ_ICN_DISPLAY),
     62	DEFINE_BUS_INTERCONNECT("PL301_DISPLAY", IMX8MQ_ICN_DISPLAY, NULL, IMX8MQ_ICN_MAIN),
     63
     64	/* AUDIO */
     65	DEFINE_BUS_MASTER("SDMA2", IMX8MQ_ICM_SDMA2, IMX8MQ_ICN_AUDIO),
     66	DEFINE_BUS_INTERCONNECT("PL301_AUDIO", IMX8MQ_ICN_AUDIO, NULL, IMX8MQ_ICN_DISPLAY),
     67
     68	/* ENET */
     69	DEFINE_BUS_MASTER("ENET", IMX8MQ_ICM_ENET, IMX8MQ_ICN_ENET),
     70	DEFINE_BUS_INTERCONNECT("PL301_ENET", IMX8MQ_ICN_ENET, NULL, IMX8MQ_ICN_MAIN),
     71
     72	/* OTHER */
     73	DEFINE_BUS_MASTER("SDMA1", IMX8MQ_ICM_SDMA1, IMX8MQ_ICN_MAIN),
     74	DEFINE_BUS_MASTER("NAND", IMX8MQ_ICM_NAND, IMX8MQ_ICN_MAIN),
     75	DEFINE_BUS_MASTER("USDHC1", IMX8MQ_ICM_USDHC1, IMX8MQ_ICN_MAIN),
     76	DEFINE_BUS_MASTER("USDHC2", IMX8MQ_ICM_USDHC2, IMX8MQ_ICN_MAIN),
     77	DEFINE_BUS_MASTER("PCIE1", IMX8MQ_ICM_PCIE1, IMX8MQ_ICN_MAIN),
     78	DEFINE_BUS_MASTER("PCIE2", IMX8MQ_ICM_PCIE2, IMX8MQ_ICN_MAIN),
     79	DEFINE_BUS_INTERCONNECT("PL301_MAIN", IMX8MQ_ICN_MAIN, NULL,
     80			IMX8MQ_ICN_NOC, IMX8MQ_ICS_OCRAM),
     81};
     82
     83static int imx8mq_icc_probe(struct platform_device *pdev)
     84{
     85	return imx_icc_register(pdev, nodes, ARRAY_SIZE(nodes));
     86}
     87
     88static int imx8mq_icc_remove(struct platform_device *pdev)
     89{
     90	return imx_icc_unregister(pdev);
     91}
     92
     93static struct platform_driver imx8mq_icc_driver = {
     94	.probe = imx8mq_icc_probe,
     95	.remove = imx8mq_icc_remove,
     96	.driver = {
     97		.name = "imx8mq-interconnect",
     98		.sync_state = icc_sync_state,
     99	},
    100};
    101
    102module_platform_driver(imx8mq_icc_driver);
    103MODULE_ALIAS("platform:imx8mq-interconnect");
    104MODULE_AUTHOR("Leonard Crestez <leonard.crestez@nxp.com>");
    105MODULE_LICENSE("GPL v2");