cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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Kconfig (3073B)


      1# SPDX-License-Identifier: GPL-2.0-only
      2# Intel IOMMU support
      3config DMAR_TABLE
      4	bool
      5
      6config DMAR_PERF
      7	bool
      8
      9config DMAR_DEBUG
     10	bool
     11
     12config INTEL_IOMMU
     13	bool "Support for Intel IOMMU using DMA Remapping Devices"
     14	depends on PCI_MSI && ACPI && (X86 || IA64)
     15	select DMA_OPS
     16	select IOMMU_API
     17	select IOMMU_IOVA
     18	select NEED_DMA_MAP_STATE
     19	select DMAR_TABLE
     20	select SWIOTLB
     21	select IOASID
     22	select IOMMU_DMA
     23	select PCI_ATS
     24	help
     25	  DMA remapping (DMAR) devices support enables independent address
     26	  translations for Direct Memory Access (DMA) from devices.
     27	  These DMA remapping devices are reported via ACPI tables
     28	  and include PCI device scope covered by these DMA
     29	  remapping devices.
     30
     31if INTEL_IOMMU
     32
     33config INTEL_IOMMU_DEBUGFS
     34	bool "Export Intel IOMMU internals in Debugfs"
     35	depends on IOMMU_DEBUGFS
     36	select DMAR_PERF
     37	select DMAR_DEBUG
     38	help
     39	  !!!WARNING!!!
     40
     41	  DO NOT ENABLE THIS OPTION UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!!!
     42
     43	  Expose Intel IOMMU internals in Debugfs.
     44
     45	  This option is -NOT- intended for production environments, and should
     46	  only be enabled for debugging Intel IOMMU.
     47
     48config INTEL_IOMMU_SVM
     49	bool "Support for Shared Virtual Memory with Intel IOMMU"
     50	depends on X86_64
     51	select PCI_PASID
     52	select PCI_PRI
     53	select MMU_NOTIFIER
     54	select IOASID
     55	select IOMMU_SVA
     56	help
     57	  Shared Virtual Memory (SVM) provides a facility for devices
     58	  to access DMA resources through process address space by
     59	  means of a Process Address Space ID (PASID).
     60
     61config INTEL_IOMMU_DEFAULT_ON
     62	bool "Enable Intel DMA Remapping Devices by default"
     63	default y
     64	help
     65	  Selecting this option will enable a DMAR device at boot time if
     66	  one is found. If this option is not selected, DMAR support can
     67	  be enabled by passing intel_iommu=on to the kernel.
     68
     69config INTEL_IOMMU_BROKEN_GFX_WA
     70	bool "Workaround broken graphics drivers (going away soon)"
     71	depends on BROKEN && X86
     72	help
     73	  Current Graphics drivers tend to use physical address
     74	  for DMA and avoid using DMA APIs. Setting this config
     75	  option permits the IOMMU driver to set a unity map for
     76	  all the OS-visible memory. Hence the driver can continue
     77	  to use physical addresses for DMA, at least until this
     78	  option is removed in the 2.6.32 kernel.
     79
     80config INTEL_IOMMU_FLOPPY_WA
     81	def_bool y
     82	depends on X86
     83	help
     84	  Floppy disk drivers are known to bypass DMA API calls
     85	  thereby failing to work when IOMMU is enabled. This
     86	  workaround will setup a 1:1 mapping for the first
     87	  16MiB to make floppy (an ISA device) work.
     88
     89config INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON
     90	bool "Enable Intel IOMMU scalable mode by default"
     91	default y
     92	help
     93	  Selecting this option will enable by default the scalable mode if
     94	  hardware presents the capability. The scalable mode is defined in
     95	  VT-d 3.0. The scalable mode capability could be checked by reading
     96	  /sys/devices/virtual/iommu/dmar*/intel-iommu/ecap. If this option
     97	  is not selected, scalable mode support could also be enabled by
     98	  passing intel_iommu=sm_on to the kernel. If not sure, please use
     99	  the default value.
    100
    101endif # INTEL_IOMMU