cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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irq-keystone.c (6029B)


      1/*
      2 * Texas Instruments Keystone IRQ controller IP driver
      3 *
      4 * Copyright (C) 2014 Texas Instruments, Inc.
      5 * Author: Sajesh Kumar Saran <sajesh@ti.com>
      6 *	   Grygorii Strashko <grygorii.strashko@ti.com>
      7 *
      8 * This program is free software; you can redistribute it and/or
      9 * modify it under the terms of the GNU General Public License as
     10 * published by the Free Software Foundation version 2.
     11 *
     12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
     13 * kind, whether express or implied; without even the implied warranty
     14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     15 * GNU General Public License for more details.
     16 */
     17
     18#include <linux/irq.h>
     19#include <linux/bitops.h>
     20#include <linux/module.h>
     21#include <linux/moduleparam.h>
     22#include <linux/interrupt.h>
     23#include <linux/irqdomain.h>
     24#include <linux/irqchip.h>
     25#include <linux/of.h>
     26#include <linux/of_platform.h>
     27#include <linux/mfd/syscon.h>
     28#include <linux/regmap.h>
     29
     30/* The source ID bits start from 4 to 31 (total 28 bits)*/
     31#define BIT_OFS			4
     32#define KEYSTONE_N_IRQ		(32 - BIT_OFS)
     33
     34struct keystone_irq_device {
     35	struct device		*dev;
     36	struct irq_chip		 chip;
     37	u32			 mask;
     38	int			 irq;
     39	struct irq_domain	*irqd;
     40	struct regmap		*devctrl_regs;
     41	u32			devctrl_offset;
     42	raw_spinlock_t		wa_lock;
     43};
     44
     45static inline u32 keystone_irq_readl(struct keystone_irq_device *kirq)
     46{
     47	int ret;
     48	u32 val = 0;
     49
     50	ret = regmap_read(kirq->devctrl_regs, kirq->devctrl_offset, &val);
     51	if (ret < 0)
     52		dev_dbg(kirq->dev, "irq read failed ret(%d)\n", ret);
     53	return val;
     54}
     55
     56static inline void
     57keystone_irq_writel(struct keystone_irq_device *kirq, u32 value)
     58{
     59	int ret;
     60
     61	ret = regmap_write(kirq->devctrl_regs, kirq->devctrl_offset, value);
     62	if (ret < 0)
     63		dev_dbg(kirq->dev, "irq write failed ret(%d)\n", ret);
     64}
     65
     66static void keystone_irq_setmask(struct irq_data *d)
     67{
     68	struct keystone_irq_device *kirq = irq_data_get_irq_chip_data(d);
     69
     70	kirq->mask |= BIT(d->hwirq);
     71	dev_dbg(kirq->dev, "mask %lu [%x]\n", d->hwirq, kirq->mask);
     72}
     73
     74static void keystone_irq_unmask(struct irq_data *d)
     75{
     76	struct keystone_irq_device *kirq = irq_data_get_irq_chip_data(d);
     77
     78	kirq->mask &= ~BIT(d->hwirq);
     79	dev_dbg(kirq->dev, "unmask %lu [%x]\n", d->hwirq, kirq->mask);
     80}
     81
     82static void keystone_irq_ack(struct irq_data *d)
     83{
     84	/* nothing to do here */
     85}
     86
     87static irqreturn_t keystone_irq_handler(int irq, void *keystone_irq)
     88{
     89	struct keystone_irq_device *kirq = keystone_irq;
     90	unsigned long wa_lock_flags;
     91	unsigned long pending;
     92	int src, err;
     93
     94	dev_dbg(kirq->dev, "start irq %d\n", irq);
     95
     96	pending = keystone_irq_readl(kirq);
     97	keystone_irq_writel(kirq, pending);
     98
     99	dev_dbg(kirq->dev, "pending 0x%lx, mask 0x%x\n", pending, kirq->mask);
    100
    101	pending = (pending >> BIT_OFS) & ~kirq->mask;
    102
    103	dev_dbg(kirq->dev, "pending after mask 0x%lx\n", pending);
    104
    105	for (src = 0; src < KEYSTONE_N_IRQ; src++) {
    106		if (BIT(src) & pending) {
    107			raw_spin_lock_irqsave(&kirq->wa_lock, wa_lock_flags);
    108			err = generic_handle_domain_irq(kirq->irqd, src);
    109			raw_spin_unlock_irqrestore(&kirq->wa_lock,
    110						   wa_lock_flags);
    111
    112			if (err)
    113				dev_warn_ratelimited(kirq->dev, "spurious irq detected hwirq %d\n",
    114						     src);
    115		}
    116	}
    117
    118	dev_dbg(kirq->dev, "end irq %d\n", irq);
    119	return IRQ_HANDLED;
    120}
    121
    122static int keystone_irq_map(struct irq_domain *h, unsigned int virq,
    123				irq_hw_number_t hw)
    124{
    125	struct keystone_irq_device *kirq = h->host_data;
    126
    127	irq_set_chip_data(virq, kirq);
    128	irq_set_chip_and_handler(virq, &kirq->chip, handle_level_irq);
    129	irq_set_probe(virq);
    130	return 0;
    131}
    132
    133static const struct irq_domain_ops keystone_irq_ops = {
    134	.map	= keystone_irq_map,
    135	.xlate	= irq_domain_xlate_onecell,
    136};
    137
    138static int keystone_irq_probe(struct platform_device *pdev)
    139{
    140	struct device *dev = &pdev->dev;
    141	struct device_node *np = dev->of_node;
    142	struct keystone_irq_device *kirq;
    143	int ret;
    144
    145	if (np == NULL)
    146		return -EINVAL;
    147
    148	kirq = devm_kzalloc(dev, sizeof(*kirq), GFP_KERNEL);
    149	if (!kirq)
    150		return -ENOMEM;
    151
    152	kirq->devctrl_regs =
    153		syscon_regmap_lookup_by_phandle(np, "ti,syscon-dev");
    154	if (IS_ERR(kirq->devctrl_regs))
    155		return PTR_ERR(kirq->devctrl_regs);
    156
    157	ret = of_property_read_u32_index(np, "ti,syscon-dev", 1,
    158					 &kirq->devctrl_offset);
    159	if (ret) {
    160		dev_err(dev, "couldn't read the devctrl_offset offset!\n");
    161		return ret;
    162	}
    163
    164	kirq->irq = platform_get_irq(pdev, 0);
    165	if (kirq->irq < 0)
    166		return kirq->irq;
    167
    168	kirq->dev = dev;
    169	kirq->mask = ~0x0;
    170	kirq->chip.name		= "keystone-irq";
    171	kirq->chip.irq_ack	= keystone_irq_ack;
    172	kirq->chip.irq_mask	= keystone_irq_setmask;
    173	kirq->chip.irq_unmask	= keystone_irq_unmask;
    174
    175	kirq->irqd = irq_domain_add_linear(np, KEYSTONE_N_IRQ,
    176					   &keystone_irq_ops, kirq);
    177	if (!kirq->irqd) {
    178		dev_err(dev, "IRQ domain registration failed\n");
    179		return -ENODEV;
    180	}
    181
    182	raw_spin_lock_init(&kirq->wa_lock);
    183
    184	platform_set_drvdata(pdev, kirq);
    185
    186	ret = request_irq(kirq->irq, keystone_irq_handler,
    187			  0, dev_name(dev), kirq);
    188	if (ret) {
    189		irq_domain_remove(kirq->irqd);
    190		return ret;
    191	}
    192
    193	/* clear all source bits */
    194	keystone_irq_writel(kirq, ~0x0);
    195
    196	dev_info(dev, "irqchip registered, nr_irqs %u\n", KEYSTONE_N_IRQ);
    197
    198	return 0;
    199}
    200
    201static int keystone_irq_remove(struct platform_device *pdev)
    202{
    203	struct keystone_irq_device *kirq = platform_get_drvdata(pdev);
    204	int hwirq;
    205
    206	free_irq(kirq->irq, kirq);
    207
    208	for (hwirq = 0; hwirq < KEYSTONE_N_IRQ; hwirq++)
    209		irq_dispose_mapping(irq_find_mapping(kirq->irqd, hwirq));
    210
    211	irq_domain_remove(kirq->irqd);
    212	return 0;
    213}
    214
    215static const struct of_device_id keystone_irq_dt_ids[] = {
    216	{ .compatible = "ti,keystone-irq", },
    217	{},
    218};
    219MODULE_DEVICE_TABLE(of, keystone_irq_dt_ids);
    220
    221static struct platform_driver keystone_irq_device_driver = {
    222	.probe		= keystone_irq_probe,
    223	.remove		= keystone_irq_remove,
    224	.driver		= {
    225		.name	= "keystone_irq",
    226		.of_match_table	= of_match_ptr(keystone_irq_dt_ids),
    227	}
    228};
    229
    230module_platform_driver(keystone_irq_device_driver);
    231
    232MODULE_AUTHOR("Texas Instruments");
    233MODULE_AUTHOR("Sajesh Kumar Saran");
    234MODULE_AUTHOR("Grygorii Strashko");
    235MODULE_DESCRIPTION("Keystone IRQ chip");
    236MODULE_LICENSE("GPL v2");