cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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netjet.h (1217B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * NETjet common header file
      4 *
      5 * Author	Karsten Keil
      6 *              based on work of Matt Henderson and Daniel Potts,
      7 *              Traverse Technologies P/L www.traverse.com.au
      8 *
      9 * Copyright 2009  by Karsten Keil <keil@isdn4linux.de>
     10 */
     11
     12#define NJ_CTRL			0x00
     13#define NJ_DMACTRL		0x01
     14#define NJ_AUXCTRL		0x02
     15#define NJ_AUXDATA		0x03
     16#define NJ_IRQMASK0		0x04
     17#define NJ_IRQMASK1		0x05
     18#define NJ_IRQSTAT0		0x06
     19#define NJ_IRQSTAT1		0x07
     20#define NJ_DMA_READ_START	0x08
     21#define NJ_DMA_READ_IRQ		0x0c
     22#define NJ_DMA_READ_END		0x10
     23#define NJ_DMA_READ_ADR		0x14
     24#define NJ_DMA_WRITE_START	0x18
     25#define NJ_DMA_WRITE_IRQ	0x1c
     26#define NJ_DMA_WRITE_END	0x20
     27#define NJ_DMA_WRITE_ADR	0x24
     28#define NJ_PULSE_CNT		0x28
     29
     30#define NJ_ISAC_OFF		0xc0
     31#define NJ_ISACIRQ		0x10
     32
     33#define NJ_IRQM0_RD_MASK	0x03
     34#define NJ_IRQM0_RD_IRQ		0x01
     35#define NJ_IRQM0_RD_END		0x02
     36#define NJ_IRQM0_WR_MASK	0x0c
     37#define NJ_IRQM0_WR_IRQ		0x04
     38#define NJ_IRQM0_WR_END		0x08
     39
     40/* one page here is no need to be smaller */
     41#define NJ_DMA_SIZE		4096
     42/* 2 * 64 byte is a compromise between IRQ count and latency */
     43#define NJ_DMA_RXSIZE		128  /* 2 * 64 */
     44#define NJ_DMA_TXSIZE		128  /* 2 * 64 */