cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mtk-adsp-mailbox.c (4675B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (c) 2022 MediaTek Corporation. All rights reserved.
      4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
      5 */
      6
      7#include <linux/interrupt.h>
      8#include <linux/io.h>
      9#include <linux/iopoll.h>
     10#include <linux/kernel.h>
     11#include <linux/mailbox_controller.h>
     12#include <linux/module.h>
     13#include <linux/of_device.h>
     14#include <linux/slab.h>
     15
     16struct mtk_adsp_mbox_priv {
     17	struct device *dev;
     18	struct mbox_controller mbox;
     19	void __iomem *va_mboxreg;
     20	const struct mtk_adsp_mbox_cfg *cfg;
     21};
     22
     23struct mtk_adsp_mbox_cfg {
     24	u32 set_in;
     25	u32 set_out;
     26	u32 clr_in;
     27	u32 clr_out;
     28};
     29
     30static inline struct mtk_adsp_mbox_priv *get_mtk_adsp_mbox_priv(struct mbox_controller *mbox)
     31{
     32	return container_of(mbox, struct mtk_adsp_mbox_priv, mbox);
     33}
     34
     35static irqreturn_t mtk_adsp_mbox_irq(int irq, void *data)
     36{
     37	struct mbox_chan *chan = data;
     38	struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
     39	u32 op = readl(priv->va_mboxreg + priv->cfg->set_out);
     40
     41	writel(op, priv->va_mboxreg + priv->cfg->clr_out);
     42
     43	return IRQ_WAKE_THREAD;
     44}
     45
     46static irqreturn_t mtk_adsp_mbox_isr(int irq, void *data)
     47{
     48	struct mbox_chan *chan = data;
     49
     50	mbox_chan_received_data(chan, NULL);
     51
     52	return IRQ_HANDLED;
     53}
     54
     55static struct mbox_chan *mtk_adsp_mbox_xlate(struct mbox_controller *mbox,
     56					     const struct of_phandle_args *sp)
     57{
     58	return mbox->chans;
     59}
     60
     61static int mtk_adsp_mbox_startup(struct mbox_chan *chan)
     62{
     63	struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
     64
     65	/* Clear ADSP mbox command */
     66	writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_in);
     67	writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_out);
     68
     69	return 0;
     70}
     71
     72static void mtk_adsp_mbox_shutdown(struct mbox_chan *chan)
     73{
     74	struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
     75
     76	/* Clear ADSP mbox command */
     77	writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_in);
     78	writel(0xFFFFFFFF, priv->va_mboxreg + priv->cfg->clr_out);
     79}
     80
     81static int mtk_adsp_mbox_send_data(struct mbox_chan *chan, void *data)
     82{
     83	struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
     84	u32 *msg = data;
     85
     86	writel(*msg, priv->va_mboxreg + priv->cfg->set_in);
     87
     88	return 0;
     89}
     90
     91static bool mtk_adsp_mbox_last_tx_done(struct mbox_chan *chan)
     92{
     93	struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
     94
     95	return readl(priv->va_mboxreg + priv->cfg->set_in) == 0;
     96}
     97
     98static const struct mbox_chan_ops mtk_adsp_mbox_chan_ops = {
     99	.send_data	= mtk_adsp_mbox_send_data,
    100	.startup	= mtk_adsp_mbox_startup,
    101	.shutdown	= mtk_adsp_mbox_shutdown,
    102	.last_tx_done	= mtk_adsp_mbox_last_tx_done,
    103};
    104
    105static int mtk_adsp_mbox_probe(struct platform_device *pdev)
    106{
    107	struct device *dev = &pdev->dev;
    108	struct mtk_adsp_mbox_priv *priv;
    109	const struct mtk_adsp_mbox_cfg *cfg;
    110	struct mbox_controller *mbox;
    111	int ret, irq;
    112
    113	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
    114	if (!priv)
    115		return -ENOMEM;
    116
    117	mbox = &priv->mbox;
    118	mbox->dev = dev;
    119	mbox->ops = &mtk_adsp_mbox_chan_ops;
    120	mbox->txdone_irq = false;
    121	mbox->txdone_poll = true;
    122	mbox->of_xlate = mtk_adsp_mbox_xlate;
    123	mbox->num_chans = 1;
    124	mbox->chans = devm_kzalloc(dev, sizeof(*mbox->chans), GFP_KERNEL);
    125	if (!mbox->chans)
    126		return -ENOMEM;
    127
    128	priv->va_mboxreg = devm_platform_ioremap_resource(pdev, 0);
    129	if (IS_ERR(priv->va_mboxreg))
    130		return PTR_ERR(priv->va_mboxreg);
    131
    132	cfg = of_device_get_match_data(dev);
    133	if (!cfg)
    134		return -EINVAL;
    135	priv->cfg = cfg;
    136
    137	irq = platform_get_irq(pdev, 0);
    138	if (irq < 0)
    139		return irq;
    140
    141	ret = devm_request_threaded_irq(dev, irq, mtk_adsp_mbox_irq,
    142					mtk_adsp_mbox_isr, IRQF_TRIGGER_NONE,
    143					dev_name(dev), mbox->chans);
    144	if (ret < 0)
    145		return ret;
    146
    147	platform_set_drvdata(pdev, priv);
    148
    149	return devm_mbox_controller_register(dev, &priv->mbox);
    150}
    151
    152static const struct mtk_adsp_mbox_cfg mt8186_adsp_mbox_cfg = {
    153	.set_in		= 0x00,
    154	.set_out	= 0x04,
    155	.clr_in		= 0x08,
    156	.clr_out	= 0x0C,
    157};
    158
    159static const struct mtk_adsp_mbox_cfg mt8195_adsp_mbox_cfg = {
    160	.set_in		= 0x00,
    161	.set_out	= 0x1c,
    162	.clr_in		= 0x04,
    163	.clr_out	= 0x20,
    164};
    165
    166static const struct of_device_id mtk_adsp_mbox_of_match[] = {
    167	{ .compatible = "mediatek,mt8186-adsp-mbox", .data = &mt8186_adsp_mbox_cfg },
    168	{ .compatible = "mediatek,mt8195-adsp-mbox", .data = &mt8195_adsp_mbox_cfg },
    169	{},
    170};
    171MODULE_DEVICE_TABLE(of, mtk_adsp_mbox_of_match);
    172
    173static struct platform_driver mtk_adsp_mbox_driver = {
    174	.probe		= mtk_adsp_mbox_probe,
    175	.driver = {
    176		.name	= "mtk_adsp_mbox",
    177		.of_match_table = mtk_adsp_mbox_of_match,
    178	},
    179};
    180module_platform_driver(mtk_adsp_mbox_driver);
    181
    182MODULE_AUTHOR("Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>");
    183MODULE_DESCRIPTION("MTK ADSP Mailbox Controller");
    184MODULE_LICENSE("GPL v2");